1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
| //===- llvm/MC/MCInst.h - MCInst class --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MCInst and MCOperand classes, which
// is the basic representation used to represent low-level machine code
// instructions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_MC_MCINST_H
#define LLVM_MC_MCINST_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/SMLoc.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
namespace llvm {
class MCExpr;
class MCInst;
class MCInstPrinter;
class raw_ostream;
/// Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union.
class MCOperand {
enum MachineOperandType : unsigned char {
kInvalid, ///< Uninitialized.
kRegister, ///< Register operand.
kImmediate, ///< Immediate operand.
kFPImmediate, ///< Floating-point immediate operand.
kExpr, ///< Relocatable immediate operand.
kInst ///< Sub-instruction operand.
};
MachineOperandType Kind = kInvalid;
union {
unsigned RegVal;
int64_t ImmVal;
double FPImmVal;
const MCExpr *ExprVal;
const MCInst *InstVal;
};
public:
MCOperand() : FPImmVal(0.0) {}
bool isValid() const { return Kind != kInvalid; }
bool isReg() const { return Kind == kRegister; }
bool isImm() const { return Kind == kImmediate; }
bool isFPImm() const { return Kind == kFPImmediate; }
bool isExpr() const { return Kind == kExpr; }
bool isInst() const { return Kind == kInst; }
/// Returns the register number.
unsigned getReg() const {
assert(isReg() && "This is not a register operand!");
return RegVal;
}
/// Set the register number.
void setReg(unsigned Reg) {
assert(isReg() && "This is not a register operand!");
RegVal = Reg;
}
int64_t getImm() const {
assert(isImm() && "This is not an immediate");
return ImmVal;
}
void setImm(int64_t Val) {
assert(isImm() && "This is not an immediate");
ImmVal = Val;
}
double getFPImm() const {
assert(isFPImm() && "This is not an FP immediate");
return FPImmVal;
}
void setFPImm(double Val) {
assert(isFPImm() && "This is not an FP immediate");
FPImmVal = Val;
}
const MCExpr *getExpr() const {
assert(isExpr() && "This is not an expression");
return ExprVal;
}
void setExpr(const MCExpr *Val) {
assert(isExpr() && "This is not an expression");
ExprVal = Val;
}
const MCInst *getInst() const {
assert(isInst() && "This is not a sub-instruction");
return InstVal;
}
void setInst(const MCInst *Val) {
assert(isInst() && "This is not a sub-instruction");
InstVal = Val;
}
static MCOperand createReg(unsigned Reg) {
MCOperand Op;
Op.Kind = kRegister;
Op.RegVal = Reg;
return Op;
}
static MCOperand createImm(int64_t Val) {
MCOperand Op;
Op.Kind = kImmediate;
Op.ImmVal = Val;
return Op;
}
static MCOperand createFPImm(double Val) {
MCOperand Op;
Op.Kind = kFPImmediate;
Op.FPImmVal = Val;
return Op;
}
static MCOperand createExpr(const MCExpr *Val) {
MCOperand Op;
Op.Kind = kExpr;
Op.ExprVal = Val;
return Op;
}
static MCOperand createInst(const MCInst *Val) {
MCOperand Op;
Op.Kind = kInst;
Op.InstVal = Val;
return Op;
}
void print(raw_ostream &OS) const;
void dump() const;
bool isBareSymbolRef() const;
bool evaluateAsConstantImm(int64_t &Imm) const;
};
/// Instances of this class represent a single low-level machine
/// instruction.
class MCInst {
unsigned Opcode = 0;
SMLoc Loc;
SmallVector<MCOperand, 8> Operands;
// These flags could be used to pass some info from one target subcomponent
// to another, for example, from disassembler to asm printer. The values of
// the flags have any sense on target level only (e.g. prefixes on x86).
unsigned Flags = 0;
public:
MCInst() = default;
void setOpcode(unsigned Op) { Opcode = Op; }
unsigned getOpcode() const { return Opcode; }
void setFlags(unsigned F) { Flags = F; }
unsigned getFlags() const { return Flags; }
void setLoc(SMLoc loc) { Loc = loc; }
SMLoc getLoc() const { return Loc; }
const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
MCOperand &getOperand(unsigned i) { return Operands[i]; }
unsigned getNumOperands() const { return Operands.size(); }
void addOperand(const MCOperand &Op) { Operands.push_back(Op); }
using iterator = SmallVectorImpl<MCOperand>::iterator;
using const_iterator = SmallVectorImpl<MCOperand>::const_iterator;
void clear() { Operands.clear(); }
void erase(iterator I) { Operands.erase(I); }
void erase(iterator First, iterator Last) { Operands.erase(First, Last); }
size_t size() const { return Operands.size(); }
iterator begin() { return Operands.begin(); }
const_iterator begin() const { return Operands.begin(); }
iterator end() { return Operands.end(); }
const_iterator end() const { return Operands.end(); }
iterator insert(iterator I, const MCOperand &Op) {
return Operands.insert(I, Op);
}
void print(raw_ostream &OS) const;
void dump() const;
/// Dump the MCInst as prettily as possible using the additional MC
/// structures, if given. Operators are separated by the \p Separator
/// string.
void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr,
StringRef Separator = " ") const;
void dump_pretty(raw_ostream &OS, StringRef Name,
StringRef Separator = " ") const;
};
inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) {
MO.print(OS);
return OS;
}
inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
MI.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_MC_MCINST_H
|