|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h 767 State.MIs[0]->getDebugLoc(), TII.get(Opcode));
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp 1410 MI.getDebugLoc()) {
1411 PrologEndLoc = MI.getDebugLoc();
2893 DebugLoc DL = MI->getDebugLoc();
2898 DL = NextMI.getDebugLoc();
lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp 248 assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
250 InlinedEntity Var(RawVar, MI.getDebugLoc()->getInlinedAt());
256 assert(RawLabel->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
261 InlinedEntity L(RawLabel, MI.getDebugLoc()->getInlinedAt());
lib/CodeGen/AsmPrinter/DwarfDebug.cpp 259 assert(getInlinedAt() == DbgValue->getDebugLoc()->getInlinedAt() &&
1301 assert(DbgValue->getDebugLoc() && "DBG_VALUE without a debug location");
1303 auto DL = DbgValue->getDebugLoc();
1321 auto PredDL = Pred->getDebugLoc();
1646 const DebugLoc &DL = MI->getDebugLoc();
1732 MI.getDebugLoc())
1733 return MI.getDebugLoc();
lib/CodeGen/BranchFolding.cpp 906 DebugLoc DL = MI.getDebugLoc();
920 DL = DILocation::getMergedLocation(DL, Pos->getDebugLoc());
1339 return I->getDebugLoc();
lib/CodeGen/BranchRelaxation.cpp 301 DebugLoc DL = MI.getDebugLoc();
469 DebugLoc DL = MI.getDebugLoc();
lib/CodeGen/EarlyIfConversion.cpp 563 DebugLoc HeadDL = FirstTerm->getDebugLoc();
583 DebugLoc HeadDL = FirstTerm->getDebugLoc();
661 DebugLoc HeadDL = Head->getFirstTerminator()->getDebugLoc();
lib/CodeGen/ExpandPostRAPseudos.cpp 119 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
165 TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
lib/CodeGen/GCRootLowering.cpp 270 MCSymbol *Label = InsertLabel(*CI->getParent(), RAI, CI->getDebugLoc());
271 FI->addSafePoint(Label, CI->getDebugLoc());
lib/CodeGen/GlobalISel/IRTranslator.cpp 143 assert((CurrInst->getDebugLoc() == MI.getDebugLoc() ||
144 MI.getDebugLoc().getLine() == 0) &&
lib/CodeGen/GlobalISel/Utils.cpp 57 BuildMI(MBB, InsertIt, InsertPt.getDebugLoc(),
62 BuildMI(MBB, std::next(InsertIt), InsertPt.getDebugLoc(),
199 MI.getDebugLoc(), MI.getParent());
lib/CodeGen/IfConversion.cpp 2013 dl = TIE->getDebugLoc();
lib/CodeGen/InlineSpiller.cpp 615 NewMI->setDebugLoc(MI.getDebugLoc());
945 BuildMI(MBB, std::next(MI), MI->getDebugLoc(), TII.get(TargetOpcode::KILL))
lib/CodeGen/LexicalScopes.cpp 78 const DILocation *MIDL = MInsn.getDebugLoc();
313 if (const DILocation *IDL = I.getDebugLoc())
lib/CodeGen/LiveDebugValues.cpp 153 MI.getDebugLoc()->getInlinedAt()) {}
224 UVS(MI.getDebugLoc(), LS) {
282 const DebugLoc &DbgLoc = MI.getDebugLoc();
676 const DILocation *DebugLoc = MI.getDebugLoc();
1294 !MI.getDebugLoc()->getInlinedAt();
1336 if (const DebugLoc &DL = MI.getDebugLoc())
lib/CodeGen/LiveDebugVariables.cpp 647 getUserValue(Var, Expr, MI.getDebugLoc());
667 const DebugLoc &DL = MI.getDebugLoc();
lib/CodeGen/MIRPrinter.cpp 788 if (const DebugLoc &DL = MI.getDebugLoc()) {
lib/CodeGen/MachineBasicBlock.cpp 1295 return MBBI->getDebugLoc();
1305 if (!MBBI->isDebugInstr()) return MBBI->getDebugLoc();
1319 DL = TI->getDebugLoc();
1322 DL = DILocation::getMergedLocation(DL, TI->getDebugLoc());
lib/CodeGen/MachineInstr.cpp 135 : MCID(&MI.getDesc()), Info(MI.Info), debugLoc(MI.getDebugLoc()) {
649 if (getDebugLoc() && Other.getDebugLoc() &&
649 if (getDebugLoc() && Other.getDebugLoc() &&
650 getDebugLoc() != Other.getDebugLoc())
650 getDebugLoc() != Other.getDebugLoc())
1713 if (const DebugLoc &DL = getDebugLoc()) {
1750 if (const DebugLoc &DL = getDebugLoc()) {
2074 assert(MI.getDebugVariable()->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
2090 return BuildMI(BB, I, Orig.getDebugLoc(), Orig.getDesc())
lib/CodeGen/MachineInstrBundle.cpp 113 if (MII->getDebugLoc().get())
114 return MII->getDebugLoc();
lib/CodeGen/MachineOutliner.cpp 959 C.front()->getDebugLoc(), C.getMBB());
972 CandidatesForRepeatedSeq[i].front()->getDebugLoc());
997 OF.Candidates[i].front()->getDebugLoc());
lib/CodeGen/MachineSink.cpp 772 MI.setDebugLoc(DILocation::getMergedLocation(MI.getDebugLoc(),
773 InsertPos->getDebugLoc()));
lib/CodeGen/ModuloSchedule.cpp 812 BuildMI(*KernelBB, MI, MI->getDebugLoc(),
lib/CodeGen/PHIElimination.cpp 267 PHICopy = BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
285 PHICopy = TII->createPHIDestinationCopy(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
405 NewSrcInstr = BuildMI(opBlock, InsertPos, MPhi->getDebugLoc(),
415 TII->createPHISourceCopy(opBlock, InsertPos, MPhi->getDebugLoc(),
lib/CodeGen/PatchableFunction.cpp 72 auto MIB = BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(),
lib/CodeGen/PeepholeOptimizer.cpp 585 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
766 MachineInstrBuilder MIB = BuildMI(*MBB, &OrigPHI, OrigPHI.getDebugLoc(),
1235 BuildMI(*CopyLike.getParent(), &CopyLike, CopyLike.getDebugLoc(),
lib/CodeGen/RegisterCoalescer.cpp 1123 MachineInstr *NewCopyMI = BuildMI(*CopyLeftBB, InsPos, CopyMI.getDebugLoc(),
1277 DebugLoc DL = CopyMI->getDebugLoc();
lib/CodeGen/SelectionDAG/FastISel.cpp 321 LocalMI.setDebugLoc(SinkPos->getDebugLoc());
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 597 DebugLoc DL = MI->getDebugLoc();
lib/CodeGen/ShrinkWrap.cpp 494 MBB.front().getDebugLoc(), &MBB);
lib/CodeGen/TailDuplicator.cpp 437 BuildMI(*PredBB, NewMI, NewMI.getDebugLoc(),
lib/CodeGen/TargetInstrInfo.cpp 139 DebugLoc DL = Tail->getDebugLoc();
501 MF.CreateMachineInstr(TII.get(MI.getOpcode()), MI.getDebugLoc(), true);
838 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR)
842 BuildMI(*MF, Root.getDebugLoc(), TII->get(Opcode), RegC)
lib/CodeGen/TargetLoweringBase.cpp 1046 MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), MI->getDesc());
1105 auto MIB = BuildMI(MF, MI.getDebugLoc(), MI.getDesc());
1120 auto MIB = BuildMI(MF, MI.getDebugLoc(), MI.getDesc());
lib/CodeGen/TwoAddressInstructionPass.cpp 1552 MachineInstrBuilder MIB = BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
1837 MachineInstr *CopyMI = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
lib/CodeGen/UnreachableBlockElim.cpp 195 BuildMI(*BB, BB->getFirstNonPHI(), phi->getDebugLoc(),
lib/CodeGen/XRayInstrumentation.cpp 108 auto MIB = BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc))
139 BuildMI(MBB, T, T.getDebugLoc(), TII->get(Opc));
205 BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(),
lib/Target/AArch64/AArch64A53Fix835769.cpp 178 DebugLoc DL = I->getDebugLoc();
182 DebugLoc DL = MI->getDebugLoc();
lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp 276 MachineInstrBuilder MIB = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
362 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), Dst)
lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp 104 MachineInstr *Copy = BuildMI(*I.getParent(), I, I.getDebugLoc(),
126 BuildMI(*I.getParent(), ++I.getIterator(), I.getDebugLoc(),
lib/Target/AArch64/AArch64CondBrTuning.cpp 105 MachineInstrBuilder MIB = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
137 return BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(AArch64::Bcc))
lib/Target/AArch64/AArch64ConditionOptimizer.cpp 279 BuildMI(*MBB, CmpMI, CmpMI->getDebugLoc(), TII->get(Opc))
291 BuildMI(*MBB, BrMI, BrMI.getDebugLoc(), TII->get(AArch64::Bcc))
lib/Target/AArch64/AArch64ConditionalCompares.cpp 612 DebugLoc TermDL = Head->getFirstTerminator()->getDebugLoc();
695 MachineInstrBuilder MIB = BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), MCID)
708 BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), TII->get(AArch64::Bcc))
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp 135 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
145 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
155 MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
175 DebugLoc DL = MI.getDebugLoc();
254 DebugLoc DL = MI.getDebugLoc();
347 DebugLoc DL = MI.getDebugLoc();
466 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opcode),
484 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
499 DebugLoc DL = MI.getDebugLoc();
501 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg);
508 MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::LDRWui))
553 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)
567 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi), DstReg)
574 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
586 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDXri))
607 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MRS), DstReg)
624 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::RET))
656 BuildMI(MBB, MBBI, MI.getDebugLoc(),
684 emitFrameOffset(MBB, &MI, MI.getDebugLoc(), SrcReg, FrameReg,
687 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::IRG))
695 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADDG))
lib/Target/AArch64/AArch64FalkorHWPFFix.cpp 769 DebugLoc DL = MI.getDebugLoc();
lib/Target/AArch64/AArch64FrameLowering.cpp 278 DebugLoc DL = I->getDebugLoc();
489 DebugLoc DL = MBBI->getDebugLoc();
1291 DL = MBBI->getDebugLoc();
1338 DL = MBBI->getDebugLoc();
2083 DL = MI->getDebugLoc();
lib/Target/AArch64/AArch64ISelLowering.cpp 1339 DebugLoc DL = MI.getDebugLoc();
lib/Target/AArch64/AArch64InstrInfo.cpp 1476 DebugLoc DL = MI.getDebugLoc();
3466 emitFrameOffset(*MI.getParent(), MI, MI.getDebugLoc(),
4021 MIB = BuildMI(MF, Root.getDebugLoc(), TII->get(MaddOpc), ResultReg)
4026 MIB = BuildMI(MF, Root.getDebugLoc(), TII->get(MaddOpc), ResultReg)
4032 MIB = BuildMI(MF, Root.getDebugLoc(), TII->get(MaddOpc), ResultReg)
4086 BuildMI(MF, Root.getDebugLoc(), TII->get(MaddOpc), ResultReg)
4182 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR)
4216 BuildMI(MF, Root.getDebugLoc(), TII->get(SubOpc), NewVR)
4273 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR)
4540 BuildMI(MF, Root.getDebugLoc(), TII->get(AArch64::FNEGv4f16), NewVR)
4587 BuildMI(MF, Root.getDebugLoc(), TII->get(AArch64::FNEGv8f16), NewVR)
4647 BuildMI(MF, Root.getDebugLoc(), TII->get(AArch64::FNEGv2f32), NewVR)
4667 BuildMI(MF, Root.getDebugLoc(), TII->get(AArch64::FNEGv4f32), NewVR)
4687 BuildMI(MF, Root.getDebugLoc(), TII->get(AArch64::FNEGv2f64), NewVR)
4830 DebugLoc DL = MI.getDebugLoc();
4872 DebugLoc DL = MI.getDebugLoc();
lib/Target/AArch64/AArch64InstructionSelector.cpp 725 BuildMI(*I.getParent(), I, I.getDebugLoc(),
1000 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(CBOpc))
1096 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::ADDXri))
1104 MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::STRXui))
1416 auto MIB = BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::TBNZW))
1424 auto CMP = BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::ANDSWri))
1430 BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::Bcc))
1661 BuildMI(MBB, I.getIterator(), I.getDebugLoc(),
2047 BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::SUBREG_TO_REG))
2173 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::ANDSWri))
2178 MachineInstr &CSelMI = *BuildMI(MBB, I, I.getDebugLoc(), TII.get(CSelOpc))
2229 auto CmpMI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(CmpOpc))
2244 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::CSINCWr))
2253 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::CSINCWr))
2259 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::ORRWrr))
2296 auto MovMI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::MOVaddrBA),
2751 MachineInstr &SubRegMI = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
2759 MachineInstr &SubRegMI2 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
2766 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AArch64::BFMXri))
2993 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(TargetOpcode::IMPLICIT_DEF),
2999 *BuildMI(MBB, I, I.getDebugLoc(),
3027 *BuildMI(MBB, I, I.getDebugLoc(), TII.get(CopyOpc), CopyTo)
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp 761 DebugLoc DL = I->getDebugLoc();
857 DebugLoc DL = I->getDebugLoc();
978 BuildMI(*LoadI->getParent(), LoadI, LoadI->getDebugLoc(),
1018 BuildMI(*LoadI->getParent(), LoadI, LoadI->getDebugLoc(),
1026 BuildMI(*LoadI->getParent(), LoadI, LoadI->getDebugLoc(),
1399 MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), TII->get(NewOpc))
1408 MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), TII->get(NewOpc))
lib/Target/AArch64/AArch64RegisterInfo.cpp 412 DL = Ins->getDebugLoc();
504 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset,
506 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AArch64::LDG), ScratchReg)
534 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII);
lib/Target/AArch64/AArch64SIMDInstrOpt.cpp 424 const DebugLoc &DL = MI.getDebugLoc();
507 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/AArch64/AArch64SpeculationHardening.cpp 266 DL = (--MBB.instr_end())->getDebugLoc();
326 (MBB.begin())->getDebugLoc());
450 BuildMI(MBB, MBBI, MI.getDebugLoc(),
575 BuildMI(MBB, MBBI, MI.getDebugLoc(),
621 DL = MI.getDebugLoc();
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 113 const DebugLoc &DL = I.getDebugLoc();
226 BuildMI(*BB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), DstReg)
303 const DebugLoc &DL = I.getDebugLoc();
400 const DebugLoc &DL = I.getDebugLoc();
444 const DebugLoc &DL = I.getDebugLoc();
470 const DebugLoc &DL = MI.getDebugLoc();
512 const DebugLoc &DL = MI.getDebugLoc();
603 const DebugLoc &DL = I.getDebugLoc();
621 BuildMI(*BB, &I, I.getDebugLoc(), TII.get(AMDGPU::SI_IF_BREAK))
718 const DebugLoc &DL = I.getDebugLoc();
761 const DebugLoc &DL = Insert->getDebugLoc();
1053 const DebugLoc &DL = I.getDebugLoc();
1072 BuildMI(*BB, &I, I.getDebugLoc(),
1094 const DebugLoc &DL = I.getDebugLoc();
1219 const DebugLoc &DL = I.getDebugLoc();
1380 const DebugLoc &DL = I.getDebugLoc();
1433 const DebugLoc &DL = I.getDebugLoc();
1546 BuildMI(*BB, &I, I.getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), AMDGPU::M0)
1560 const DebugLoc &DL = I.getDebugLoc();
1639 const DebugLoc &DL = I.getDebugLoc();
1941 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), OffsetReg)
2013 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::V_MOV_B32_e32),
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 1650 Fn, "local memory global used by non-kernel function", MI.getDebugLoc());
1663 Fn, "unsupported initializer for address space", MI.getDebugLoc());
lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp 1409 PHIInfo.addDest(LinearizeDestReg, PHI.getDebugLoc());
1427 PHIInfo.addDest(PHIDestReg, Instr.getDebugLoc());
1485 BuildMI(*MBB, PHI, PHI.getDebugLoc(), TII->get(TargetOpcode::PHI),
1530 BuildMI(*MBB, PHI, PHI.getDebugLoc(), TII->get(TargetOpcode::PHI),
1579 BuildMI(*MBB, PHI, PHI.getDebugLoc(), TII->get(TargetOpcode::PHI),
2454 BuildMI(*EntrySucc, EntrySucc->instr_begin(), PHI.getDebugLoc(),
lib/Target/AMDGPU/AMDILCFGStructurizer.cpp 601 if (instr->getDebugLoc())
602 DL = instr->getDebugLoc();
1392 DebugLoc BranchDL = BranchMI->getDebugLoc();
1450 DebugLoc DL = BranchMI->getDebugLoc();
1476 DebugLoc DL = MI->getDebugLoc();
lib/Target/AMDGPU/GCNDPPCombine.cpp 168 OrigMI.getDebugLoc(), TII->get(DPPOp));
437 auto UndefInst = BuildMI(*MovMI.getParent(), MovMI, MovMI.getDebugLoc(),
lib/Target/AMDGPU/GCNHazardRecognizer.cpp 201 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII.get(AMDGPU::S_NOP))
896 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
941 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(AMDGPU::V_NOP_e32));
1027 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
1068 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
1128 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp 401 InsertPos = BuildMI(MBB, InsertPos->getDebugLoc(),
443 MachineInstrBuilder MILit = BuildMI(MBB, I, I->getDebugLoc(),
lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp 203 DebugLoc DL = Pos->getDebugLoc();
lib/Target/AMDGPU/SIAddIMGInit.cpp 96 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 300 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY),
309 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(Opc),
625 BuildMI(MBB, MI, MI.getDebugLoc(),
740 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
lib/Target/AMDGPU/SIFixupVectorISel.cpp 186 NewGlob = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcd));
lib/Target/AMDGPU/SIFoldOperands.cpp 263 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), Dst1.getReg())
690 const DebugLoc &DL = UseMI->getDebugLoc();
lib/Target/AMDGPU/SIFrameLowering.cpp 1107 const DebugLoc &DL = I->getDebugLoc();
lib/Target/AMDGPU/SIISelLowering.cpp 3107 BuildMI(*MBB, E, MI.getDebugLoc(), TII->get(AMDGPU::S_WAITCNT))
3117 const DebugLoc &DL = MI.getDebugLoc();
3282 const DebugLoc &DL = MI.getDebugLoc();
3339 const DebugLoc &DL = MI.getDebugLoc();
3411 const DebugLoc &DL = MI.getDebugLoc();
3433 const DebugLoc &DL = MI.getDebugLoc();
3506 const DebugLoc &DL = MI.getDebugLoc();
3521 const DebugLoc &DL = MI.getDebugLoc();
3549 const DebugLoc &DL = MI.getDebugLoc();
3604 const DebugLoc &DL = MI.getDebugLoc();
3646 BuildMI(*BB, MI.getIterator(), MI.getDebugLoc(),
3654 BuildMI(*BB, &*BB->begin(), MI.getDebugLoc(), TII->get(AMDGPU::S_MOV_B64),
3662 BuildMI(*BB, &*BB->begin(), MI.getDebugLoc(), TII->get(AMDGPU::S_MOV_B32),
3726 DebugLoc DL = MI.getDebugLoc();
3756 const DebugLoc &DL = MI.getDebugLoc();
3789 const DebugLoc &DL = MI.getDebugLoc();
3811 const DebugLoc &DL = MI.getDebugLoc();
3829 const DebugLoc &DL = MI.getDebugLoc();
10457 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
lib/Target/AMDGPU/SIInsertSkips.cpp 159 const DebugLoc &DL = MI.getDebugLoc();
186 DebugLoc DL = MI.getDebugLoc();
328 const DebugLoc &DL = MI.getDebugLoc();
520 BuildMI(*BI, I, MI.getDebugLoc(), TII->get(AMDGPU::S_BRANCH))
lib/Target/AMDGPU/SIInsertWaitcnts.cpp 1153 MI.getDebugLoc(), TII->get(AMDGPU::S_WAITCNT))
1167 BuildMI(*MI.getParent(), MI.getIterator(), MI.getDebugLoc(),
1430 BuildMI(Block, Inst, Inst.getDebugLoc(),
1581 BuildMI(*MBB, I, I->getDebugLoc(), TII->get(AMDGPU::S_DCACHE_WB));
lib/Target/AMDGPU/SIInstrInfo.cpp 1242 const DebugLoc &DL = Insert->getDebugLoc();
2663 return BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpc))
2674 return BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpc))
2684 return BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpc))
2697 return BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpc))
3062 BuildMI(*MBB, MI, MI.getDebugLoc(), get(Op32));
3860 DebugLoc DL = MI->getDebugLoc();
4035 const DebugLoc &DL = MI.getDebugLoc();
4044 const DebugLoc &DL = MI.getDebugLoc();
4070 const DebugLoc &DL = MI.getDebugLoc();
4139 const DebugLoc &DL = MI.getDebugLoc();
4221 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(),
4228 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(),
4237 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(),
4244 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(),
4410 const DebugLoc &DL = MI.getDebugLoc();
4490 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B64), Zero64)
4494 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), SRsrcFormatLo)
4498 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::S_MOV_B32), SRsrcFormatHi)
4502 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(AMDGPU::REG_SEQUENCE), NewSRsrc)
4588 legalizeGenericOperand(*InsertBB, Insert, RC, Op, MRI, MI.getDebugLoc());
4612 legalizeGenericOperand(*MBB, MI, VRC, Op, MRI, MI.getDebugLoc());
4630 legalizeGenericOperand(*MBB, MI, DstRC, Op, MRI, MI.getDebugLoc());
4710 const DebugLoc &DL = MI.getDebugLoc();
4726 BuildMI(MBB, MI, MI.getDebugLoc(), get(AMDGPU::REG_SEQUENCE), NewVAddr)
4758 BuildMI(MBB, MI, MI.getDebugLoc(), get(Addr64Opcode))
4788 Addr64 = BuildMI(MBB, MI, MI.getDebugLoc(), get(Addr64Opcode))
4802 BuildMI(MBB, Addr64, Addr64->getDebugLoc(), get(AMDGPU::REG_SEQUENCE),
4950 BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(AMDGPU::S_AND_B32),
4955 BuildMI(*MBB, Inst, Inst.getDebugLoc(), get(AMDGPU::S_AND_B64),
5141 DebugLoc DL = Inst.getDebugLoc();
5168 const DebugLoc &DL = Inst.getDebugLoc();
5234 const DebugLoc &DL = Inst.getDebugLoc();
5263 const DebugLoc &DL = Inst.getDebugLoc();
5294 DebugLoc DL = Inst.getDebugLoc();
5359 const DebugLoc &DL = Inst.getDebugLoc();
5421 DebugLoc DL = Inst.getDebugLoc();
5485 const DebugLoc &DL = Inst.getDebugLoc();
5524 const DebugLoc &DL = Inst.getDebugLoc();
5560 const DebugLoc &DL = Inst.getDebugLoc();
5659 const DebugLoc &DL = Inst.getDebugLoc();
6077 BuildMI(*MF, Branch->getDebugLoc(), get(AMDGPU::SI_IF), DstReg)
6081 BuildMI(*MF, Branch->getDebugLoc(), get(AMDGPU::SI_END_CF))
6105 BuildMI(*(MF), Branch->getDebugLoc(), get(TargetOpcode::PHI), DstReg);
6121 MachineInstr *SIIFBREAK = BuildMI(*(MF), Branch->getDebugLoc(),
6126 BuildMI(*(MF), Branch->getDebugLoc(), get(AMDGPU::SI_LOOP))
6549 return BuildMI(MBB, InsPt, InsPt->getDebugLoc(),
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 905 DebugLoc DL = CI.I->getDebugLoc();
998 DebugLoc DL = CI.I->getDebugLoc();
1040 DebugLoc DL = CI.I->getDebugLoc();
1094 DebugLoc DL = CI.I->getDebugLoc();
1144 DebugLoc DL = CI.I->getDebugLoc();
1298 DebugLoc DL = CI.I->getDebugLoc();
1362 BuildMI(*MI.getParent(), MI.getIterator(), MI.getDebugLoc(),
1375 DebugLoc DL = MI.getDebugLoc();
lib/Target/AMDGPU/SILowerControlFlow.cpp 200 const DebugLoc &DL = MI.getDebugLoc();
283 const DebugLoc &DL = MI.getDebugLoc();
356 const DebugLoc &DL = MI.getDebugLoc();
397 const DebugLoc &DL = MI.getDebugLoc();
421 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/AMDGPU/SILowerI1Copies.cpp 519 DebugLoc DL = MI.getDebugLoc();
696 DebugLoc DL = MI.getDebugLoc();
lib/Target/AMDGPU/SIMemoryLegalizer.cpp 447 DiagnosticInfoUnsupported Diag(Func, Msg, MI->getDebugLoc());
720 DebugLoc DL = MI->getDebugLoc();
764 DebugLoc DL = MI->getDebugLoc();
858 DebugLoc DL = MI->getDebugLoc();
960 DebugLoc DL = MI->getDebugLoc();
1014 DebugLoc DL = MI->getDebugLoc();
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp 406 const DebugLoc &DL = SaveExecInst->getDebugLoc();
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp 259 BuildMI(MBB, *And, And->getDebugLoc(), TII->get(Andn2Opc),
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 924 auto NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc));
930 auto NewInst = BuildMI(MBB, MISucc, MISucc.getDebugLoc(), TII->get(SuccOpc));
1010 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), SDWADesc);
1193 auto Copy = BuildMI(*MI.getParent(), MI.getIterator(), MI.getDebugLoc(),
lib/Target/AMDGPU/SIRegisterInfo.cpp 350 DL = Ins->getDebugLoc();
568 return BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(Opc), Dst)
581 const DebugLoc &DL = MI->getDebugLoc();
630 const DebugLoc &DL = MI->getDebugLoc();
764 const DebugLoc &DL = MI->getDebugLoc();
879 const DebugLoc &DL = MI->getDebugLoc();
991 DebugLoc DL = MI->getDebugLoc();
1089 const DebugLoc &DL = MI->getDebugLoc();
lib/Target/AMDGPU/SIShrinkInstructions.cpp 528 BuildMI(*MovT.getParent(), MovX->getIterator(), MovT.getDebugLoc(),
lib/Target/AMDGPU/SIWholeQuadMode.cpp 842 const DebugLoc &DL = MI->getDebugLoc();
lib/Target/ARC/ARCBranchFinalize.cpp 117 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
132 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
136 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(ARC::Bcc))
lib/Target/ARC/ARCExpandPseudos.cpp 65 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg)
68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(),
lib/Target/ARC/ARCFrameLowering.cpp 475 DebugLoc dl = Old.getDebugLoc();
lib/Target/ARC/ARCRegisterInfo.cpp 45 DebugLoc dl = MI.getDebugLoc();
lib/Target/ARM/A15SDOptimizer.cpp 511 DebugLoc DL = MI->getDebugLoc();
lib/Target/ARM/ARMBaseInstrInfo.cpp 190 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
199 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
208 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
221 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
228 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
242 BuildMI(MF, MI.getDebugLoc(), get(MemOpc), MI.getOperand(0).getReg())
247 MemMI = BuildMI(MF, MI.getDebugLoc(), get(MemOpc))
258 BuildMI(MF, MI.getDebugLoc(), get(MemOpc), MI.getOperand(0).getReg())
263 MemMI = BuildMI(MF, MI.getDebugLoc(), get(MemOpc))
777 BuildMI(MBB, I, I->getDebugLoc(), get(Opc), DestReg);
796 MachineInstrBuilder MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
931 BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMSR_P0), DestReg)
937 BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMRS_P0), DestReg)
943 BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMSR_FPSCR_NZCVQC), DestReg)
949 BuildMI(MBB, I, I->getDebugLoc(), get(ARM::VMRS_FPSCR_NZCVQC), DestReg)
976 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst).addReg(Src);
1274 if (I != MBB.end()) DL = I->getDebugLoc();
1518 DebugLoc dl = MI->getDebugLoc();
1710 BuildMI(MBB, I, Orig.getDebugLoc(), get(Opcode), DestReg)
2257 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), DefMI->getDesc(), DestReg);
3318 BuildMI(*UseMI.getParent(), UseMI, UseMI.getDebugLoc(), get(NewUseOpc),
4774 DebugLoc DL = MI->getDebugLoc();
5073 NewMIB = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(ARM::VEXTd32),
5225 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(ARM::FCONSTD), DReg)
lib/Target/ARM/ARMBaseRegisterInfo.cpp 640 DL = Ins->getDebugLoc();
824 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
828 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
lib/Target/ARM/ARMConstantIslandPass.cpp 1750 BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET))
1918 MachineInstrBuilder MIB = BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(),
1973 BuildMI(*MBB, Br.MI, Br.MI->getDebugLoc(), TII->get(Cmp.NewOpc))
2296 BuildMI(*MBB, MI_JT, MI->getDebugLoc(), TII->get(Opc))
lib/Target/ARM/ARMExpandPseudoInsts.cpp 479 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
590 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
667 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
752 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
846 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
847 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri))
878 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg);
879 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc))
934 DebugLoc DL = MI.getDebugLoc();
1053 DebugLoc DL = MI.getDebugLoc();
1168 DebugLoc dl = MBBI->getDebugLoc();
1219 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc),
1232 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1244 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1257 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr),
1273 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc),
1285 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1299 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1322 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc),
1348 emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
1351 emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
1354 emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6,
1369 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(bicOpc), ARM::R6)
1384 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1397 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1420 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1427 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1433 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1453 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewLdOpc), DstReg)
1458 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPICADD))
1505 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LDRLITOpc), DstReg)
1513 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(PICAddOpc))
1543 MachineInstrBuilder MIB1 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1548 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc), DstReg)
1553 MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
1576 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri), ARM::PC)
1589 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1620 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1932 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPUSH))
1937 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tBL));
1940 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::STMDB_UPD))
1947 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::BL));
lib/Target/ARM/ARMFrameLowering.cpp 792 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
1064 DL = MI->getDebugLoc();
1169 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc() : DebugLoc();
1342 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc() : DebugLoc();
2155 DebugLoc dl = Old.getDebugLoc();
lib/Target/ARM/ARMISelLowering.cpp 9343 DebugLoc dl = MI.getDebugLoc();
9467 DebugLoc dl = MI.getDebugLoc();
10021 DebugLoc dl = MI.getDebugLoc();
10259 DebugLoc DL = MI.getDebugLoc();
10332 DebugLoc DL = MI.getDebugLoc();
10401 DebugLoc dl = MI.getDebugLoc();
10694 DebugLoc DL = MI.getDebugLoc();
lib/Target/ARM/ARMInstrInfo.cpp 119 DebugLoc DL = MI->getDebugLoc();
lib/Target/ARM/ARMInstructionSelector.cpp 484 DbgLoc(MIB->getDebugLoc()) {}
693 auto MIBLoad = BuildMI(MBB, InsertBefore, MIB->getDebugLoc(),
721 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(),
726 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(),
770 auto &DbgLoc = MIB->getDebugLoc();
884 BuildMI(MBB, InsertBefore, I.getDebugLoc(), TII.get(Opcodes.RSB))
933 BuildMI(MBB, InsertBefore, I.getDebugLoc(), TII.get(ARM::VMOVRRD))
1105 auto AndI = BuildMI(MBB, InsertBefore, I.getDebugLoc(), TII.get(Opcodes.AND))
1141 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcodes.TSTri))
1150 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcodes.Bcc))
lib/Target/ARM/ARMLoadStoreOptimizer.cpp 900 DebugLoc DL = First->getDebugLoc();
1269 DebugLoc DL = MI->getDebugLoc();
1393 DebugLoc DL = MI->getDebugLoc();
1540 DebugLoc DL = MI.getDebugLoc();
1628 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(),
1637 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MBBI->getDebugLoc(),
1698 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1706 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1984 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(ARM::tBX))
2211 dl = Op0->getDebugLoc();
lib/Target/ARM/ARMLowOverheadLoops.cpp 362 MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
373 MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(BrOpc));
395 MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
420 MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(),
434 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(BrOpc));
452 BuildMI(*MBB, InsertPt, InsertPt->getDebugLoc(), TII->get(Opc));
470 MachineInstrBuilder MIB = BuildMI(*MBB, End, End->getDebugLoc(),
lib/Target/ARM/MLxExpansionPass.cpp 290 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
297 MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID2)
lib/Target/ARM/MVEVPTBlockPass.cpp 176 DebugLoc dl = MI->getDebugLoc();
lib/Target/ARM/Thumb1FrameLowering.cpp 124 DebugLoc dl = Old.getDebugLoc();
473 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
638 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP_RET))
665 dl = MBBI->getDebugLoc();
753 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII.get(ARM::tPOP))
945 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc() : DebugLoc();
lib/Target/ARM/Thumb1InstrInfo.cpp 89 if (I != MBB.end()) DL = I->getDebugLoc();
118 if (I != MBB.end()) DL = I->getDebugLoc();
lib/Target/ARM/Thumb2ITBlockPass.cpp 201 DebugLoc dl = MI->getDebugLoc();
lib/Target/ARM/Thumb2InstrInfo.cpp 140 if (I != MBB.end()) DL = I->getDebugLoc();
188 if (I != MBB.end()) DL = I->getDebugLoc();
lib/Target/ARM/Thumb2SizeReduction.cpp 479 DebugLoc dl = MI->getDebugLoc();
581 DebugLoc dl = MI->getDebugLoc();
651 BuildMI(MBB, MI, MI->getDebugLoc(),
822 DebugLoc dl = MI->getDebugLoc();
914 DebugLoc dl = MI->getDebugLoc();
lib/Target/ARM/ThumbRegisterInfo.cpp 367 DebugLoc dl = MI.getDebugLoc();
463 DebugLoc dl = MI.getDebugLoc();
lib/Target/AVR/AVRExpandPseudoInsts.cpp 63 return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode));
68 return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode), DstReg);
lib/Target/AVR/AVRFrameLowering.cpp 57 DebugLoc DL = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
160 DebugLoc DL = MBBI->getDebugLoc();
333 BuildMI(MBB, I, MI.getDebugLoc(), TII.get(AVR::PUSHRr))
336 BuildMI(MBB, I, MI.getDebugLoc(), TII.get(AVR::PUSHRr))
340 BuildMI(MBB, I, MI.getDebugLoc(), TII.get(AVR::PUSHRr))
375 DebugLoc DL = MI->getDebugLoc();
525 DL = MBBI->getDebugLoc();
lib/Target/AVR/AVRISelLowering.cpp 1444 DebugLoc dl = MI.getDebugLoc();
1590 BuildMI(*BB, I, MI.getDebugLoc(), TII.get(AVR::EORRdRr), AVR::R1)
1627 DebugLoc dl = MI.getDebugLoc();
lib/Target/AVR/AVRInstrInfo.cpp 133 DL = MI->getDebugLoc();
166 DL = MI->getDebugLoc();
lib/Target/AVR/AVRRegisterInfo.cpp 134 DebugLoc dl = MI.getDebugLoc();
lib/Target/AVR/AVRRelaxMemOperations.cpp 54 return BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(Opcode));
lib/Target/BPF/BPFISelLowering.cpp 570 DebugLoc DL = MI.getDebugLoc();
620 DebugLoc DL = MI.getDebugLoc();
lib/Target/BPF/BPFInstrInfo.cpp 52 DebugLoc dl = MI->getDebugLoc();
131 DL = I->getDebugLoc();
154 DL = I->getDebugLoc();
lib/Target/BPF/BPFMIChecking.cpp 167 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/BPF/BPFMIPeephole.cpp 170 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::SUBREG_TO_REG), DstReg)
437 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::MOV_rr), DstReg)
lib/Target/BPF/BPFMISimplifyPatchable.cpp 128 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::COPY), DstReg)
lib/Target/BPF/BPFRegisterInfo.cpp 65 DebugLoc DL = MI.getDebugLoc();
70 if (I.getDebugLoc()) {
71 DL = I.getDebugLoc();
lib/Target/BPF/BTFDebug.cpp 1028 const DebugLoc &DL = MI->getDebugLoc();
lib/Target/Hexagon/HexagonBitSimplify.cpp 1343 const DebugLoc &DL = MI->getDebugLoc();
1476 DebugLoc DL = I->getDebugLoc();
1601 DebugLoc DL = I->getDebugLoc();
2026 DebugLoc DL = MI->getDebugLoc();
2048 DebugLoc DL = MI->getDebugLoc();
2096 DebugLoc DL = MI->getDebugLoc();
2137 DebugLoc DL = MI->getDebugLoc();
2265 DebugLoc DL = DefS->getDebugLoc();
2332 DebugLoc DL = MI->getDebugLoc();
2539 DebugLoc DL = MI->getDebugLoc();
2590 const DebugLoc &DL = MI->getDebugLoc();
3072 BuildMI(LB, At, At->getDebugLoc(), HII->get(TargetOpcode::PHI), PhiR)
3084 DebugLoc DL = SI->getDebugLoc();
3288 DebugLoc DL = (T != C.PB->end()) ? T->getDebugLoc() : DebugLoc();
lib/Target/Hexagon/HexagonConstExtenders.cpp 1587 DebugLoc dl = MI.getDebugLoc();
1705 DebugLoc dl = MI.getDebugLoc();
lib/Target/Hexagon/HexagonConstPropagation.cpp 2843 const DebugLoc &DL = MI.getDebugLoc();
2951 const DebugLoc &DL = MI.getDebugLoc();
3152 auto NI = BuildMI(B, BrI.getIterator(), BrI.getDebugLoc(), JD)
lib/Target/Hexagon/HexagonCopyToCombine.cpp 652 DebugLoc DL = InsertPt->getDebugLoc();
667 DebugLoc DL = InsertPt->getDebugLoc();
764 DebugLoc DL = InsertPt->getDebugLoc();
812 DebugLoc DL = InsertPt->getDebugLoc();
863 DebugLoc DL = InsertPt->getDebugLoc();
lib/Target/Hexagon/HexagonEarlyIfConv.cpp 713 DL = At->getDebugLoc();
715 DL = ToB->back().getDebugLoc();
862 DebugLoc DL = OldTI->getDebugLoc();
998 const DebugLoc &DL = PN->getDebugLoc();
lib/Target/Hexagon/HexagonExpandCondsets.cpp 628 const DebugLoc &DL = MI->getDebugLoc();
870 DebugLoc DL = Where->getDebugLoc(); // "Where" points to an instruction.
lib/Target/Hexagon/HexagonFixupHwLoops.cpp 172 DebugLoc DL = MII->getDebugLoc();
lib/Target/Hexagon/HexagonFrameLowering.cpp 1233 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc() : DebugLoc();
1298 DebugLoc DL = MI != MBB.end() ? MI->getDebugLoc()
1572 DebugLoc DL = MI->getDebugLoc();
1596 DebugLoc DL = MI->getDebugLoc();
1629 DebugLoc DL = MI->getDebugLoc();
1660 DebugLoc DL = MI->getDebugLoc();
1697 DebugLoc DL = MI->getDebugLoc();
1747 DebugLoc DL = MI->getDebugLoc();
1795 DebugLoc DL = MI->getDebugLoc();
1836 DebugLoc DL = MI->getDebugLoc();
1865 DebugLoc DL = MI->getDebugLoc();
2274 const DebugLoc &DL = SI.getDebugLoc();
2306 DebugLoc DL = MI.getDebugLoc();
2333 DebugLoc DL = AI->getDebugLoc();
lib/Target/Hexagon/HexagonGenInsert.cpp 1412 DebugLoc DL = MI->getDebugLoc();
lib/Target/Hexagon/HexagonGenPredicate.cpp 266 DebugLoc DL = DefI->getDebugLoc();
385 DebugLoc DL = MI->getDebugLoc();
lib/Target/Hexagon/HexagonHardwareLoops.cpp 833 DL = InsertPos->getDebugLoc();
1243 DL = InsertPos->getDebugLoc();
1279 DebugLoc LastIDL = LastI->getDebugLoc();
1591 DebugLoc DL = DI->getDebugLoc();
lib/Target/Hexagon/HexagonHazardRecognizer.cpp 58 MI->getDebugLoc());
129 MI->getDebugLoc());
lib/Target/Hexagon/HexagonInstrInfo.cpp 690 DL(Loop->getDebugLoc()) {
743 BuildMI(*Loop->getParent(), Loop, Loop->getDebugLoc(),
1026 DebugLoc DL = MI.getDebugLoc();
1181 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi),
1185 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi),
1208 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci),
1213 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci),
1236 DebugLoc DL = MI.getDebugLoc();
1436 const DebugLoc &DL = MI.getDebugLoc();
1577 DebugLoc DL = MI.getDebugLoc();
4391 DebugLoc DL = I->getDebugLoc();
lib/Target/Hexagon/HexagonNewValueJump.cpp 680 DebugLoc dl = MI.getDebugLoc();
lib/Target/Hexagon/HexagonOptAddrMode.cpp 497 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode));
508 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode))
525 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode));
557 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode));
566 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode));
579 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode));
637 BuildMI(*BB, InsertPt, UseMI->getDebugLoc(), HII->get(NewOpCode));
lib/Target/Hexagon/HexagonPeephole.cpp 280 BuildMI(*MBB, MI.getIterator(), MI.getDebugLoc(),
lib/Target/Hexagon/HexagonRegisterInfo.cpp 221 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp 81 const DebugLoc &DL = MI.getDebugLoc();
88 const DebugLoc &DL = MI.getDebugLoc();
lib/Target/Hexagon/HexagonSplitDouble.cpp 597 DebugLoc DL = MI->getDebugLoc();
636 DebugLoc DL = MI->getDebugLoc();
708 DebugLoc DL = MI->getDebugLoc();
735 DebugLoc DL = MI->getDebugLoc();
764 DebugLoc DL = MI->getDebugLoc();
801 DebugLoc DL = MI->getDebugLoc();
921 DebugLoc DL = MI->getDebugLoc();
1102 DebugLoc DL = MI->getDebugLoc();
lib/Target/Hexagon/HexagonStoreWidening.cpp 416 DebugLoc DL = OG.back()->getDebugLoc();
lib/Target/Hexagon/HexagonVExtract.cpp 69 DebugLoc DL = ExtI->getDebugLoc();
133 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc))
146 DebugLoc DL = ExtI->getDebugLoc();
lib/Target/Hexagon/HexagonVectorPrint.cpp 164 DebugLoc DL = I->getDebugLoc();
lib/Target/Lanai/LanaiFrameLowering.cpp 74 DebugLoc DL = MI.getDebugLoc();
183 DebugLoc DL = MBBI->getDebugLoc();
lib/Target/Lanai/LanaiInstrInfo.cpp 56 DL = Position->getDebugLoc();
76 DL = Position->getDebugLoc();
514 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), DefMI->getDesc(), DestReg);
lib/Target/Lanai/LanaiMemAluCombiner.cpp 259 BuildMI(*BB, MemInstr, MemInstr->getDebugLoc(), TII->get(NewOpc));
lib/Target/Lanai/LanaiRegisterInfo.cpp 146 DebugLoc DL = MI.getDebugLoc();
lib/Target/MSP430/MSP430BranchSelector.cpp 180 DebugLoc dl = OldBranch.getDebugLoc();
lib/Target/MSP430/MSP430FrameLowering.cpp 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
86 DL = MBBI->getDebugLoc();
115 DebugLoc DL = MBBI->getDebugLoc();
148 DL = MBBI->getDebugLoc();
188 if (MI != MBB.end()) DL = MI->getDebugLoc();
214 if (MI != MBB.end()) DL = MI->getDebugLoc();
248 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP)
256 New = BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::ADD16ri),
276 BuildMI(MF, Old.getDebugLoc(), TII.get(MSP430::SUB16ri), MSP430::SP)
lib/Target/MSP430/MSP430ISelLowering.cpp 1414 DebugLoc dl = MI.getDebugLoc();
1551 DebugLoc dl = MI.getDebugLoc();
lib/Target/MSP430/MSP430InstrInfo.cpp 42 if (MI != MBB.end()) DL = MI->getDebugLoc();
69 if (MI != MBB.end()) DL = MI->getDebugLoc();
lib/Target/MSP430/MSP430RegisterInfo.cpp 112 DebugLoc dl = MI.getDebugLoc();
lib/Target/Mips/MicroMipsSizeReduction.cpp 710 DebugLoc dl = MI->getDebugLoc();
lib/Target/Mips/Mips16FrameLowering.cpp 97 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
lib/Target/Mips/Mips16ISelLowering.cpp 516 DebugLoc DL = MI.getDebugLoc();
579 DebugLoc DL = MI.getDebugLoc();
645 DebugLoc DL = MI.getDebugLoc();
714 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc))
717 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(BtOpc)).addMBB(target);
739 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(CmpOpc)).addReg(regX).addImm(imm);
740 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(BtOpc)).addMBB(target);
764 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(SltOpc))
767 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Mips::MoveR3216), CC)
784 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(SltOpc)).addReg(regX).addImm(Imm);
785 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Mips::MoveR3216), CC)
lib/Target/Mips/Mips16InstrInfo.cpp 117 if (I != MBB.end()) DL = I->getDebugLoc();
135 if (I != MBB.end()) DL = I->getDebugLoc();
247 DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
455 BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
lib/Target/Mips/Mips16RegisterInfo.cpp 135 DebugLoc DL = II->getDebugLoc();
lib/Target/Mips/MipsBranchExpansion.cpp 402 DebugLoc DL = I.Br->getDebugLoc();
762 BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP)));
lib/Target/Mips/MipsDelaySlotFiller.cpp 660 I = replaceWithCompactBranch(MBB, I, I->getDebugLoc());
666 BuildMI(MBB, std::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
lib/Target/Mips/MipsExpandPseudo.cpp 81 DebugLoc DL = I->getDebugLoc();
211 DebugLoc DL = I->getDebugLoc();
309 DebugLoc DL = I->getDebugLoc();
489 DebugLoc DL = I->getDebugLoc();
lib/Target/Mips/MipsISelLowering.cpp 1274 MIB = BuildMI(MBB, std::next(I), MI.getDebugLoc(),
1428 DebugLoc DL = MI.getDebugLoc();
1542 const DebugLoc &DL = MI.getDebugLoc();
1580 DebugLoc DL = MI.getDebugLoc();
1734 DebugLoc DL = MI.getDebugLoc();
1789 DebugLoc DL = MI.getDebugLoc();
4424 DebugLoc DL = MI.getDebugLoc();
4499 DebugLoc DL = MI.getDebugLoc();
lib/Target/Mips/MipsInstrInfo.cpp 638 MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
lib/Target/Mips/MipsInstructionSelector.cpp 245 MachineInstr *Mul = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MUL))
269 PseudoMULTu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoMULTu))
276 PseudoMove = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoMFHI))
286 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
298 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
305 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::BNE))
318 MachineInstr *SLL = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SLL))
326 MachineInstr *ADDu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
335 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
347 MachineInstr *ADDu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
357 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoIndirectBranch))
366 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoIndirectBranch))
413 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(NewOpc))
429 PseudoDIV = BuildMI(MBB, I, I.getDebugLoc(),
437 PseudoMove = BuildMI(MBB, I, I.getDebugLoc(),
449 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MOVN_I_I))
457 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::IMPLICIT_DEF))
517 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FABSOpcode))
536 MachineInstr *Trunc = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Opcode))
542 MachineInstr *Move = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MFC1))
554 MachineInstr *LWGOT = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
578 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
589 MachineInstr *LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
597 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
610 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
620 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
757 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
766 MachineInstr *FCMP = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FCMPOpcode))
773 MachineInstr *Move = BuildMI(MBB, I, I.getDebugLoc(), TII.get(MoveOpcode))
785 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SYNC)).addImm(0);
794 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LEA_ADDiu))
801 MachineInstr *Store = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SW))
lib/Target/Mips/MipsOptimizePICCall.cpp 156 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
lib/Target/Mips/MipsSEFrameLowering.cpp 178 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), Dst)
192 BuildMI(MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), VR)
212 DebugLoc DL = I->getDebugLoc();
236 DebugLoc DL = I->getDebugLoc();
270 DebugLoc DL = I->getDebugLoc();
350 BuildMI(MBB, I, I->getDebugLoc(), TII.get(Mips::IMPLICIT_DEF), DstReg);
564 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
699 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
751 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
818 DebugLoc DL = MI->getDebugLoc();
lib/Target/Mips/MipsSEISelDAGToDAG.cpp 132 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::OR64))
140 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::OR))
145 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::ADDiu))
lib/Target/Mips/MipsSEISelLowering.cpp 3039 DebugLoc DL = MI.getDebugLoc();
3108 DebugLoc DL = MI.getDebugLoc();
3173 DebugLoc DL = MI.getDebugLoc();
3222 DebugLoc DL = MI.getDebugLoc();
3248 DebugLoc DL = MI.getDebugLoc();
3284 DebugLoc DL = MI.getDebugLoc();
3330 DebugLoc DL = MI.getDebugLoc();
3444 DebugLoc DL = MI.getDebugLoc();
3479 DebugLoc DL = MI.getDebugLoc();
3513 DebugLoc DL = MI.getDebugLoc();
3568 DebugLoc DL = MI.getDebugLoc();
3662 DebugLoc DL = MI.getDebugLoc();
3767 DebugLoc DL = MI.getDebugLoc();
3824 DebugLoc DL = MI.getDebugLoc();
3853 DebugLoc DL = MI.getDebugLoc();
lib/Target/Mips/MipsSEInstrInfo.cpp 328 if (I != MBB.end()) DL = I->getDebugLoc();
682 MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
685 MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
697 BuildMI(MBB, I, I->getDebugLoc(), get(Mips::ERET));
715 BuildMI(MBB, I, I->getDebugLoc(), get(NewOpc), I->getOperand(0).getReg());
729 DebugLoc DL = I->getDebugLoc();
756 DebugLoc DL = I->getDebugLoc();
779 DebugLoc dl = I->getDebugLoc();
821 DebugLoc dl = I->getDebugLoc();
894 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9)
897 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA)
900 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg);
lib/Target/Mips/MipsSERegisterInfo.cpp 221 DebugLoc DL = II->getDebugLoc();
240 DebugLoc DL = II->getDebugLoc();
lib/Target/NVPTX/NVPTXPeephole.cpp 112 BuildMI(MF, Root.getDebugLoc(), TII->get(Prev.getOpcode()),
lib/Target/PowerPC/PPCBranchSelector.cpp 331 DebugLoc dl = OldBranch.getDebugLoc();
lib/Target/PowerPC/PPCEarlyReturn.cpp 80 BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode()))
92 BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR))
107 **PI, J, J->getDebugLoc(),
lib/Target/PowerPC/PPCFrameLowering.cpp 342 DebugLoc dl = MI.getDebugLoc();
1377 dl = MBBI->getDebugLoc();
1730 DebugLoc dl = MBBI->getDebugLoc();
2324 const DebugLoc &dl = I->getDebugLoc();
lib/Target/PowerPC/PPCISelLowering.cpp10339 DebugLoc dl = MI.getDebugLoc();
10443 DebugLoc dl = MI.getDebugLoc();
10612 DebugLoc DL = MI.getDebugLoc();
10754 DebugLoc DL = MI.getDebugLoc();
10899 DebugLoc dl = MI.getDebugLoc();
10943 DebugLoc dl = MI.getDebugLoc();
11011 DebugLoc dl = MI.getDebugLoc();
11179 DebugLoc dl = MI.getDebugLoc();
11258 DebugLoc dl = MI.getDebugLoc();
11437 DebugLoc dl = MI.getDebugLoc();
11469 DebugLoc dl = MI.getDebugLoc();
11477 DebugLoc Dl = MI.getDebugLoc();
11485 DebugLoc Dl = MI.getDebugLoc();
11492 DebugLoc dl = MI.getDebugLoc();
11514 DebugLoc dl = MI.getDebugLoc();
lib/Target/PowerPC/PPCInstrInfo.cpp 427 return BuildMI(MF, MI.getDebugLoc(), MI.getDesc())
1285 if (MI != MBB.end()) DL = MI->getDebugLoc();
1913 BuildMI(*MI->getParent(), std::next(MII), MI->getDebugLoc(),
2134 auto DL = MI.getDebugLoc();
lib/Target/PowerPC/PPCMIPeephole.cpp 372 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
393 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
418 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
474 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
656 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF),
658 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG),
705 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
795 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
1295 DebugLoc DL = CMPI2->getDebugLoc();
1440 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(),
lib/Target/PowerPC/PPCPreEmitPeephole.cpp 262 NoCond, Br->getDebugLoc());
lib/Target/PowerPC/PPCReduceCRLogicals.cpp 219 BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
223 BuildMI(*ThisMBB, ThisMBB->end(), BSI.SplitBefore->getDebugLoc(),
lib/Target/PowerPC/PPCRegisterInfo.cpp 507 DebugLoc dl = MI.getDebugLoc();
627 DebugLoc dl = MI.getDebugLoc();
651 DebugLoc dl = MI.getDebugLoc();
696 DebugLoc dl = MI.getDebugLoc();
740 DebugLoc dl = MI.getDebugLoc();
819 DebugLoc dl = MI.getDebugLoc();
869 DebugLoc dl = MI.getDebugLoc();
895 DebugLoc dl = MI.getDebugLoc();
999 DebugLoc dl = MI.getDebugLoc();
1228 DL = Ins->getDebugLoc();
lib/Target/PowerPC/PPCTLSDynamicCall.cpp 79 DebugLoc DL = MI.getDebugLoc();
lib/Target/PowerPC/PPCVSXCopy.cpp 106 BuildMI(MBB, MI, MI.getDebugLoc(),
128 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
lib/Target/PowerPC/PPCVSXSwapRemoval.cpp 802 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(),
916 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(),
924 BuildMI(*MI->getParent(), InsertPoint, MI->getDebugLoc(),
951 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(TargetOpcode::COPY),
lib/Target/RISCV/RISCVExpandPseudoInsts.cpp 363 DebugLoc DL = MI.getDebugLoc();
416 DebugLoc DL = MI.getDebugLoc();
532 DebugLoc DL = MI.getDebugLoc();
630 DebugLoc DL = MI.getDebugLoc();
lib/Target/RISCV/RISCVFrameLowering.cpp 237 DebugLoc DL = MBBI->getDebugLoc();
443 DebugLoc DL = MI->getDebugLoc();
lib/Target/RISCV/RISCVISelLowering.cpp 1125 DebugLoc DL = MI.getDebugLoc();
1156 DebugLoc DL = MI.getDebugLoc();
1188 DebugLoc DL = MI.getDebugLoc();
1289 DebugLoc DL = MI.getDebugLoc();
1334 BuildMI(*TailMBB, InsertionPoint, SelectMBBI->getDebugLoc(),
lib/Target/RISCV/RISCVInstrInfo.cpp 117 DL = I->getDebugLoc();
144 DL = I->getDebugLoc();
lib/Target/RISCV/RISCVRegisterInfo.cpp 111 DebugLoc DL = MI.getDebugLoc();
lib/Target/Sparc/DelaySlotFiller.cpp 128 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
146 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
155 BuildMI(MBB, ++J, MI->getDebugLoc(),
lib/Target/Sparc/SparcFrameLowering.cpp 226 DebugLoc dl = MBBI->getDebugLoc();
lib/Target/Sparc/SparcISelLowering.cpp 3120 DebugLoc dl = MI.getDebugLoc();
lib/Target/Sparc/SparcInstrInfo.cpp 400 if (I != MBB.end()) DL = I->getDebugLoc();
439 if (I != MBB.end()) DL = I->getDebugLoc();
lib/Target/Sparc/SparcRegisterInfo.cpp 170 DebugLoc dl = MI.getDebugLoc();
lib/Target/SystemZ/SystemZElimCompare.cpp 299 auto MIB = BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(Opcode));
lib/Target/SystemZ/SystemZFrameLowering.cpp 236 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
492 DebugLoc DL = MBBI->getDebugLoc();
510 DebugLoc DL = MBBI->getDebugLoc();
lib/Target/SystemZ/SystemZISelLowering.cpp 6512 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LA), Reg)
6605 DebugLoc DL = MI->getDebugLoc();
6684 BuildMI(MBB, MI.getDebugLoc(), TII->get(SystemZ::BRC))
6727 DebugLoc DL = MI.getDebugLoc();
6822 DebugLoc DL = MI.getDebugLoc();
6940 DebugLoc DL = MI.getDebugLoc();
7056 DebugLoc DL = MI.getDebugLoc();
7170 DebugLoc DL = MI.getDebugLoc();
7198 DebugLoc DL = MI.getDebugLoc();
7228 DebugLoc DL = MI.getDebugLoc();
7352 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LAY), Reg)
7361 BuildMI(*MBB, MI, MI.getDebugLoc(), TII->get(SystemZ::LAY), Reg)
7408 DebugLoc DL = MI.getDebugLoc();
7515 DebugLoc DL = MI.getDebugLoc();
lib/Target/SystemZ/SystemZInstrInfo.cpp 162 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(), DestReg, SrcReg,
200 emitGRX32Move(*MI.getParent(), MI, MI.getDebugLoc(),
221 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
226 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64)
232 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::EAR), Reg32)
875 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
890 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
974 BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpcode))
1021 MI.getDebugLoc(), get(SystemZ::AGSI))
1048 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1063 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1078 BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(), get(Opcode))
1093 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1104 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1131 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1142 return BuildMI(*InsertPt->getParent(), InsertPt, MI.getDebugLoc(),
1192 MI.getDebugLoc(), get(MemOpcode));
1735 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
lib/Target/SystemZ/SystemZLDCleanup.cpp 119 MachineInstr *Copy = BuildMI(*I->getParent(), I, I->getDebugLoc(),
139 MachineInstr *Copy = BuildMI(*I->getParent(), Next, I->getDebugLoc(),
lib/Target/SystemZ/SystemZLongBranch.cpp 357 DebugLoc DL = MI->getDebugLoc();
376 DebugLoc DL = MI->getDebugLoc();
lib/Target/SystemZ/SystemZPostRewrite.cpp 122 BuildMI(*MBBI->getParent(), MBBI, MBBI->getDebugLoc(),
129 BuildMI(*MBBI->getParent(), MBBI, MBBI->getDebugLoc(),
163 DebugLoc DL = MI.getDebugLoc();
228 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(SystemZ::COPY), DstReg)
lib/Target/SystemZ/SystemZRegisterInfo.cpp 262 DebugLoc DL = MI->getDebugLoc();
lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp 1076 : EHPadLayoutPred->rbegin()->getDebugLoc();
1131 BuildMI(*MBB, *RangeBegin, RangeBegin->getDebugLoc(),
1140 BuildMI(NestedEHPad, RangeEnd->getDebugLoc(), TII.get(WebAssembly::CATCH),
1142 BuildMI(NestedEHPad, RangeEnd->getDebugLoc(), TII.get(WebAssembly::BR))
1149 BuildMI(*NestedCont, NestedCont->begin(), RangeEnd->getDebugLoc(),
lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp 249 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
259 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
286 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
293 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
351 BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp 146 DebugLoc DL = I->getDebugLoc();
236 DL = InsertPt->getDebugLoc();
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 427 DebugLoc DL = MI.getDebugLoc();
lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp 136 BuildMI(MBB, InsertPos, MBB.begin()->getDebugLoc(),
158 BuildMI(MBB, TI, TI->getDebugLoc(), TII.get(WebAssembly::BR))
173 BuildMI(MBB, TI, TI->getDebugLoc(), TII.get(WebAssembly::RETHROW))
307 DebugLoc DL = Extract->getDebugLoc();
388 MBB.begin()->getDebugLoc());
lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp 192 BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::EQZ_I32), Tmp)
202 BuildMI(MBB, MI, MI->getDebugLoc(), TII.get(WebAssembly::BR_IF))
lib/Target/WebAssembly/WebAssemblyPeephole.cpp 121 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg)
lib/Target/WebAssembly/WebAssemblyRegStackify.cpp 126 MachineInstr *Const = BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
613 MachineInstr *Tee = BuildMI(MBB, Insert, Insert->getDebugLoc(),
lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp 121 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::CONST_I32),
125 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::ADD_I32),
lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp 397 BuildMI(*MBB, LoadInst, LoadInst->getDebugLoc(), TII->get(NLoadOpcode),
418 BuildMI(*MBB, StInst, StInst->getDebugLoc(), TII->get(NStoreOpcode))
lib/Target/X86/X86AvoidTrailingCall.cpp 101 BuildMI(*LastRealInstr->getParent(), MBBI, LastRealInstr->getDebugLoc(),
lib/Target/X86/X86CallFrameOptimization.cpp 502 DebugLoc DL = FrameSetup->getDebugLoc();
lib/Target/X86/X86CmovConversion.cpp 651 DebugLoc DL = MI.getDebugLoc();
lib/Target/X86/X86DiscriminateMemOps.cpp 110 const auto &DI = MI.getDebugLoc();
133 const DILocation *DI = MI.getDebugLoc();
lib/Target/X86/X86DomainReassignment.cpp 155 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(DstOpcode));
183 auto &DL = MI->getDebugLoc();
270 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(),
lib/Target/X86/X86ExpandPseudo.cpp 85 DebugLoc DL = JTInst->getDebugLoc();
183 DebugLoc DL = MBBI->getDebugLoc();
lib/Target/X86/X86FixupBWInsts.cpp 288 BuildMI(*MF, MI->getDebugLoc(), TII->get(New32BitOpcode), NewDestReg);
323 BuildMI(*MF, MI->getDebugLoc(), TII->get(X86::MOV32rr), NewDestReg)
351 BuildMI(*MF, MI->getDebugLoc(), TII->get(New32BitOpcode), NewDestReg);
lib/Target/X86/X86FixupLEAs.cpp 135 BuildMI(MBB, MBBI, MI.getDebugLoc(),
395 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
400 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
416 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
419 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
426 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
430 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpcode), DestReg)
510 BuildMI(MBB, I, MI.getDebugLoc(), ADDrr, DstR).addReg(DstR).add(Src);
518 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), ADDri, DstR)
583 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
589 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
598 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(LEAOpcode))
617 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
622 NewMI = BuildMI(MBB, I, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
645 TII->copyPhysReg(MBB, MI, MI.getDebugLoc(), DestReg, BaseReg, BIK);
649 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
658 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(LEAOpcode))
668 NewMI = BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(NewOpc), DestReg)
lib/Target/X86/X86FixupSetCC.cpp 143 BuildMI(MBB, FlagsDefMI, MI.getDebugLoc(), TII->get(X86::MOV32r0),
148 BuildMI(*ZExt->getParent(), ZExt, ZExt->getDebugLoc(),
lib/Target/X86/X86FlagsCopyLowering.cpp 410 DebugLoc TestLoc = CopyDefI.getDebugLoc();
819 BuildMI(MBB, MI.getIterator(), MI.getDebugLoc(), TII->get(X86::ADD8ri))
845 insertTest(MBB, CMovI.getIterator(), CMovI.getDebugLoc(), CondReg);
868 insertTest(JmpMBB, JmpI.getIterator(), JmpI.getDebugLoc(), CondReg);
913 auto SetLoc = SetBI.getDebugLoc();
1036 SetCCI.getDebugLoc(), TII->get(X86::MOV8mr));
lib/Target/X86/X86FloatingPoint.cpp 225 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
246 DebugLoc dl = I == MBB->end() ? DebugLoc() : I->getDebugLoc();
835 const DebugLoc &dl = MI.getDebugLoc();
1294 DebugLoc dl = MI.getDebugLoc();
1480 BuildMI(*MBB, Inst, MI.getDebugLoc(), TII->get(X86::LD_F0));
lib/Target/X86/X86FrameLowering.cpp 1598 DL = MBBI->getDebugLoc();
1674 DL = MBBI->getDebugLoc();
2143 DebugLoc DL = CatchRet->getDebugLoc();
2798 DebugLoc DL = I->getDebugLoc();
lib/Target/X86/X86ISelLowering.cpp29177 DebugLoc DL = MI.getDebugLoc();
29297 DebugLoc DL = MI.getDebugLoc();
29545 DebugLoc DL = MI.getDebugLoc();
29667 DebugLoc DL = MIItBegin->getDebugLoc();
29719 DebugLoc DL = FirstCMOV.getDebugLoc();
29874 DebugLoc DL = MI.getDebugLoc();
30017 DebugLoc DL = MI.getDebugLoc();
30152 DebugLoc DL = MI.getDebugLoc();
30187 DebugLoc DL = MI.getDebugLoc();
30203 DebugLoc DL = MI.getDebugLoc();
30232 DebugLoc DL = MI.getDebugLoc();
30362 DebugLoc DL = MI.getDebugLoc();
30424 DebugLoc DL = MI.getDebugLoc();
30467 DebugLoc DL = MI.getDebugLoc();
30627 DebugLoc DL = MI.getDebugLoc();
30803 DebugLoc DL = MI.getDebugLoc();
30887 DebugLoc DL = MI.getDebugLoc();
30936 DebugLoc DL = MI.getDebugLoc();
31166 DebugLoc DL = MI.getDebugLoc();
lib/Target/X86/X86InsertPrefetch.cpp 72 if (const auto &Loc = MI.getDebugLoc())
214 MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true);
lib/Target/X86/X86InstrInfo.cpp 658 const DebugLoc &DL = Orig.getDebugLoc();
745 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(TargetOpcode::COPY))
797 BuildMI(*MFI, MBBI, MI.getDebugLoc(), get(X86::IMPLICIT_DEF), InRegLEA);
799 BuildMI(*MFI, MBBI, MI.getDebugLoc(), get(TargetOpcode::COPY))
804 BuildMI(*MFI, MBBI, MI.getDebugLoc(), get(Opcode), OutRegLEA);
850 BuildMI(*MFI, &*MIB, MI.getDebugLoc(), get(X86::IMPLICIT_DEF), InRegLEA2);
851 InsMI2 = BuildMI(*MFI, &*MIB, MI.getDebugLoc(), get(TargetOpcode::COPY))
864 BuildMI(*MFI, MBBI, MI.getDebugLoc(), get(TargetOpcode::COPY))
933 NewMI = BuildMI(MF, MI.getDebugLoc(), get(X86::LEA64r))
958 BuildMI(MF, MI.getDebugLoc(), get(Opc))
994 BuildMI(MF, MI.getDebugLoc(), get(Opc))
1016 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc))
1059 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc)).add(Dest);
1083 BuildMI(MF, MI.getDebugLoc(), get(X86::LEA64r)).add(Dest).add(Src),
1100 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc))
1141 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(), get(Opc))
1161 MachineInstrBuilder MIB = BuildMI(MF, MI.getDebugLoc(),
1242 NewMI = BuildMI(MF, MI.getDebugLoc(), get(Opc))
1307 NewMI = BuildMI(MF, MI.getDebugLoc(), get(Opc))
3909 DebugLoc DL = MIB->getDebugLoc();
3928 DebugLoc DL = MIB->getDebugLoc();
3985 DebugLoc DL = MIB->getDebugLoc();
4578 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(Opc), Reg)
4586 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::VXORPSrr), XReg)
4595 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR32rr), XReg)
4601 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), get(X86::XOR32rr), Reg)
4666 MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true);
4696 MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true);
4722 MI.getDebugLoc(), TII.get(Opcode));
5527 MachineInstr *DataMI = MF.CreateMachineInstr(MCID, MI.getDebugLoc(), true);
7907 BuildMI(*I.getParent(), I, I.getDebugLoc(),
7934 BuildMI(*I.getParent(), Next, I.getDebugLoc(),
lib/Target/X86/X86InstructionSelector.cpp 253 BuildMI(*I.getParent(), I, I.getDebugLoc(),
829 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(ZextEntryIt->MovOp))
834 BuildMI(*I.getParent(), I, I.getDebugLoc(),
863 BuildMI(*I.getParent(), I, I.getDebugLoc(),
871 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg)
925 BuildMI(*I.getParent(), I, I.getDebugLoc(),
973 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpCmp))
977 MachineInstr &SetInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1033 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpCmp))
1039 MachineInstr &Set1 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1041 MachineInstr &Set2 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1043 MachineInstr &Set3 = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1066 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpCmp))
1071 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::SETCCr), ResultReg).addImm(CC);
1105 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::COPY), X86::EFLAGS)
1122 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opcode), DstReg)
1126 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::COPY), CarryOutReg)
1226 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::COPY), DstReg)
1263 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::COPY))
1340 *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1379 MachineInstr &InsertInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1391 MachineInstr &CopyInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(),
1411 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::TEST8ri))
1414 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::JCC_1))
1438 const DebugLoc &DbgLoc = I.getDebugLoc();
1643 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpEntry.OpCopy),
1649 BuildMI(*I.getParent(), I, I.getDebugLoc(),
1653 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::MOV32r0),
1660 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Copy),
1664 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Copy),
1668 BuildMI(*I.getParent(), I, I.getDebugLoc(),
1677 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpEntry.OpDivRem))
1692 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Copy), SourceSuperReg)
1696 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::SHR16ri),
1702 BuildMI(*I.getParent(), I, I.getDebugLoc(),
1709 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(TargetOpcode::COPY),
1726 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::TRAP));
lib/Target/X86/X86OptimizeLEAs.cpp 578 DebugLoc DL = MI.getDebugLoc();
lib/Target/X86/X86PadShortFunction.cpp 204 DebugLoc DL = MBBI->getDebugLoc();
lib/Target/X86/X86RegisterInfo.cpp 697 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr,
lib/Target/X86/X86SpeculativeLoadHardening.cpp 263 TII.insertBranch(NewMBB, &Succ, nullptr, Cond, Br->getDebugLoc());
1950 DebugLoc Loc = MI.getDebugLoc();
2332 DebugLoc Loc = MI.getDebugLoc();
2383 DebugLoc Loc = MI.getDebugLoc();
2432 DebugLoc Loc = MI.getDebugLoc();
2633 OldTargetReg, *MI.getParent(), MI.getIterator(), MI.getDebugLoc());
lib/Target/X86/X86VZeroUpper.cpp 180 DebugLoc dl = I->getDebugLoc();
lib/Target/X86/X86WinAllocaExpander.cpp 198 DebugLoc DL = MI->getDebugLoc();
lib/Target/XCore/XCoreFrameLowering.cpp 349 DebugLoc dl = MBBI->getDebugLoc();
430 DL = MI->getDebugLoc();
518 New = BuildMI(MF, Old.getDebugLoc(), TII.get(Opcode)).addImm(Amount);
522 New = BuildMI(MF, Old.getDebugLoc(), TII.get(Opcode), XCore::SP)
lib/Target/XCore/XCoreISelLowering.cpp 1526 DebugLoc dl = MI.getDebugLoc();
lib/Target/XCore/XCoreInstrInfo.cpp 367 DL = I->getDebugLoc();
389 DL = I->getDebugLoc();
432 dl = MI->getDebugLoc();
lib/Target/XCore/XCoreRegisterInfo.cpp 66 DebugLoc dl = MI.getDebugLoc();
99 DebugLoc dl = MI.getDebugLoc();
133 DebugLoc dl = MI.getDebugLoc();
167 DebugLoc dl = MI.getDebugLoc();