|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
tools/clang/utils/TableGen/ClangAttrEmitter.cpp 168 if (Attr->isSubClassOf("TargetSpecificAttr") &&
2986 if (Attr->isSubClassOf("TargetSpecificAttr")) {
3393 if (Base->isSubClassOf("SubsetSubject")) {
3446 if ((*I)->isSubClassOf("SubsetSubject")) {
3492 if ((*I)->isSubClassOf("SubsetSubject"))
3561 if (!Attr.isSubClassOf("TargetSpecificAttr"))
3686 SS << ", " << I->second->isSubClassOf("TargetSpecificAttr");
3688 << (I->second->isSubClassOf("TypeAttr") ||
3689 I->second->isSubClassOf("DeclOrTypeAttr"));
3690 SS << ", " << I->second->isSubClassOf("StmtAttr");
3741 if (Attr.isSubClassOf("TargetSpecificAttr") &&
tools/clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp 296 if (T->isSubClassOf("GenericType")) {
tools/clang/utils/TableGen/ClangTypeNodesEmitter.cpp 163 if (type->isSubClassOf(AlwaysDependentClassName))
165 if (type->isSubClassOf(NeverCanonicalClassName))
167 if (type->isSubClassOf(NeverCanonicalUnlessDependentClassName))
196 if (!type->isSubClassOf(LeafTypeClassName)) continue;
tools/clang/utils/TableGen/MveEmitter.cpp 921 if (R->isSubClassOf("Immediate"))
926 if (R->isSubClassOf("PrimitiveType"))
928 if (R->isSubClassOf("ComplexType"))
939 if (!Op->isSubClassOf("ComplexTypeOp"))
959 if (Op->isSubClassOf("CTO_Tuple")) {
965 if (Op->isSubClassOf("CTO_Pointer")) {
970 if (Op->isSubClassOf("CTO_Sign")) {
1006 } else if (Op->isSubClassOf("Type")) {
1025 if (Op->isSubClassOf("IRBuilder")) {
1034 } else if (Op->isSubClassOf("IRInt")) {
1098 (R->isSubClassOf("NameOverride") ? R->getValueAsString("basename")
1148 if (TypeRec->isSubClassOf("Immediate")) {
1151 if (Bounds->isSubClassOf("IB_ConstRange")) {
1185 if (MainOp->isSubClassOf("CustomCodegen")) {
utils/TableGen/AsmMatcherEmitter.cpp 782 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
1160 if (Rec->isSubClassOf("RegisterOperand")) {
1185 if (Rec->isSubClassOf("RegisterClass")) {
1191 if (!Rec->isSubClassOf("Operand"))
1688 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
utils/TableGen/AsmWriterEmitter.cpp 874 if (Rec->isSubClassOf("RegisterOperand") ||
875 Rec->isSubClassOf("Operand")) {
885 if (Rec->isSubClassOf("RegisterOperand"))
887 if (Rec->isSubClassOf("RegisterClass")) {
893 if (R->isSubClassOf("RegisterOperand"))
utils/TableGen/CallingConvEmitter.cpp 96 if (Action->isSubClassOf("CCPredicateAction")) {
99 if (Action->isSubClassOf("CCIfType")) {
107 } else if (Action->isSubClassOf("CCIf")) {
118 if (Action->isSubClassOf("CCDelegateTo")) {
123 } else if (Action->isSubClassOf("CCAssignToReg")) {
144 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
186 } else if (Action->isSubClassOf("CCAssignToStack")) {
210 } else if (Action->isSubClassOf("CCAssignToStackWithShadow")) {
233 } else if (Action->isSubClassOf("CCPromoteToType")) {
247 } else if (Action->isSubClassOf("CCPromoteToUpperBitsInType")) {
263 } else if (Action->isSubClassOf("CCBitConvertToType")) {
267 } else if (Action->isSubClassOf("CCTruncToType")) {
271 } else if (Action->isSubClassOf("CCPassIndirect")) {
275 } else if (Action->isSubClassOf("CCPassByVal")) {
282 } else if (Action->isSubClassOf("CCCustom")) {
utils/TableGen/CodeGenDAGPatterns.cpp 1421 if (R->isSubClassOf("SDTCisVT")) {
1427 } else if (R->isSubClassOf("SDTCisPtrTy")) {
1429 } else if (R->isSubClassOf("SDTCisInt")) {
1431 } else if (R->isSubClassOf("SDTCisFP")) {
1433 } else if (R->isSubClassOf("SDTCisVec")) {
1435 } else if (R->isSubClassOf("SDTCisSameAs")) {
1438 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) {
1442 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) {
1446 } else if (R->isSubClassOf("SDTCisEltOfVec")) {
1449 } else if (R->isSubClassOf("SDTCisSubVecOfVec")) {
1453 } else if (R->isSubClassOf("SDTCVecEltisVT")) {
1465 } else if (R->isSubClassOf("SDTCisSameNumEltsAs")) {
1469 } else if (R->isSubClassOf("SDTCisSameSizeAs")) {
1546 ->isSubClassOf("ValueType")) {
1622 if (Operand->isSubClassOf("unknown_class"))
1626 if (Operand->isSubClassOf("Operand")) {
1633 if (Operand->isSubClassOf("PointerLikeRegClass"))
1639 if (Operand->isSubClassOf("RegisterClass"))
1641 else if (Operand->isSubClassOf("RegisterOperand"))
1748 if (Operator->isSubClassOf("Intrinsic"))
1751 if (Operator->isSubClassOf("SDNode"))
1754 if (Operator->isSubClassOf("PatFrags")) {
1781 if (Operator->isSubClassOf("Instruction")) {
1790 if (OperandNode->isSubClassOf("OperandWithDefaultOps") &&
1801 if (Operator->isSubClassOf("SDNodeXForm"))
1804 if (Operator->isSubClassOf("ValueType"))
1807 if (Operator->isSubClassOf("ComplexPattern"))
1967 if (!Op->isSubClassOf("PatFrags")) {
2104 if (R->isSubClassOf("RegisterOperand")) {
2114 if (R->isSubClassOf("RegisterClass")) {
2129 if (R->isSubClassOf("PatFrags")) {
2135 if (R->isSubClassOf("Register")) {
2143 if (R->isSubClassOf("SubRegIndex")) {
2148 if (R->isSubClassOf("ValueType")) {
2167 if (R->isSubClassOf("CondCode")) {
2173 if (R->isSubClassOf("ComplexPattern")) {
2179 if (R->isSubClassOf("PointerLikeRegClass")) {
2193 if (R->isSubClassOf("Operand")) {
2230 if (!Rec->isSubClassOf("ComplexPattern"))
2243 if (DI && DI->getDef()->isSubClassOf("Operand")) {
2272 if (!Operator->isSubClassOf("SDPatternOperator"))
2304 return N->getOperator()->isSubClassOf(Class);
2307 if (DI && DI->getDef()->isSubClassOf(Class))
2411 if (getOperator()->isSubClassOf("SDNode")) {
2429 if (getOperator()->isSubClassOf("Instruction")) {
2529 if (OperandNode->isSubClassOf("Operand")) {
2575 if (getOperator()->isSubClassOf("ComplexPattern")) {
2584 assert(getOperator()->isSubClassOf("SDNodeXForm") && "Unknown node type!");
2623 if (getOperator()->isSubClassOf("Intrinsic")) {
2628 if (getOperator()->isSubClassOf("ComplexPattern"))
2706 if (R->isSubClassOf("SDNode") || R->isSubClassOf("PatFrags"))
2706 if (R->isSubClassOf("SDNode") || R->isSubClassOf("PatFrags"))
2759 if (Operator->isSubClassOf("ValueType")) {
2779 if (!Operator->isSubClassOf("PatFrags") &&
2780 !Operator->isSubClassOf("SDNode") &&
2781 !Operator->isSubClassOf("Instruction") &&
2782 !Operator->isSubClassOf("SDNodeXForm") &&
2783 !Operator->isSubClassOf("Intrinsic") &&
2784 !Operator->isSubClassOf("ComplexPattern") &&
2791 if (Operator->isSubClassOf("Instruction") ||
2792 Operator->isSubClassOf("SDNodeXForm"))
2795 if (Operator->isSubClassOf("Intrinsic"))
2798 if (Operator->isSubClassOf("SDNode") &&
2828 if (Operator->isSubClassOf("Intrinsic")) {
2846 if (Operator->isSubClassOf("ComplexPattern")) {
2953 if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
2954 DI->getDef()->isSubClassOf("RegisterOperand")))
3051 if (!N || !N->isSubClassOf("SDNode"))
3107 if (OutFrags != Frag->isSubClassOf("OutPatFrag"))
3113 Frag, LI, !Frag->isSubClassOf("OutPatFrag"),
3168 if (OutFrags != Frag->isSubClassOf("OutPatFrag"))
3243 if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
3244 DI->getDef()->isSubClassOf("RegisterOperand")))
3322 if (!Val || !Val->getDef()->isSubClassOf("Register"))
3374 if (Val->getDef()->isSubClassOf("RegisterClass") ||
3375 Val->getDef()->isSubClassOf("ValueType") ||
3376 Val->getDef()->isSubClassOf("RegisterOperand") ||
3377 Val->getDef()->isSubClassOf("PointerLikeRegClass")) {
3383 } else if (Val->getDef()->isSubClassOf("Register")) {
3442 if (LeafRec->isSubClassOf("ComplexPattern")) {
3526 if (PatDef->isSubClassOf("Instruction")) {
3576 if (Tree->getOperator()->isSubClassOf("Instruction"))
3591 if (Leaf->isSubClassOf("ValueType"))
3595 if (Leaf->isSubClassOf("ComplexPattern"))
3706 if (Op.Rec->isSubClassOf("OperandWithDefaultOps")) {
4061 if (!N->getOperator()->isSubClassOf("Instruction"))
4465 if (N->isLeaf() || N->getOperator()->isSubClassOf("ComplexPattern")) {
4546 if (RR->isSubClassOf("Register"))
utils/TableGen/CodeGenDAGPatterns.h 1064 assert(R->isSubClassOf("Predicate") &&
1292 return Op->isSubClassOf("OperandWithDefaultOps") &&
utils/TableGen/CodeGenInstruction.cpp 82 if (Rec->isSubClassOf("RegisterOperand")) {
87 } else if (Rec->isSubClassOf("Operand")) {
107 if (Rec->isSubClassOf("PredicateOp"))
109 else if (Rec->isSubClassOf("OptionalDefOperand"))
114 } else if (Rec->isSubClassOf("RegisterClass")) {
116 } else if (!Rec->isSubClassOf("PointerLikeRegClass") &&
117 !Rec->isSubClassOf("unknown_class"))
451 assert(FirstImplicitDef->isSubClassOf("Register"));
511 return Constraint->getDef()->isSubClassOf("TypedOperand") &&
547 if (InstOpRec->isSubClassOf("RegisterOperand"))
550 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand"))
553 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) {
554 if (!InstOpRec->isSubClassOf("RegisterClass"))
564 if (ADI && ADI->getDef()->isSubClassOf("Register")) {
565 if (InstOpRec->isSubClassOf("OptionalDefOperand")) {
572 if (!InstOpRec->isSubClassOf("RegisterClass"))
607 if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
619 if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
635 if (InstOpRec->isSubClassOf("Operand") && ADI &&
636 ADI->getDef()->isSubClassOf("Operand")) {
653 if (!Rec->isSubClassOf("Operand"))
673 if (!DI || !DI->getDef()->isSubClassOf("Instruction"))
utils/TableGen/CodeGenRegisters.cpp 750 if (!Type->isSubClassOf("ValueType"))
utils/TableGen/CodeGenSchedule.cpp 484 if (Queue->isSubClassOf("LoadQueue")) {
495 if (Queue->isSubClassOf("StoreQueue")) {
550 if (ModelKey->isSubClassOf("SchedMachineModel")) {
571 if (RWDef->isSubClassOf("WriteSequence")) {
576 else if (RWDef->isSubClassOf("SchedVariant")) {
605 if (RW->isSubClassOf("SchedWrite"))
608 assert(RW->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
619 if (RWDef->isSubClassOf("SchedWrite"))
622 assert(RWDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
633 if (RWDef->isSubClassOf("SchedWrite"))
636 assert(RWDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
648 if (MatchDef->isSubClassOf("SchedWrite")) {
649 if (!AliasDef->isSubClassOf("SchedWrite"))
654 assert(MatchDef->isSubClassOf("SchedRead") && "Unknown SchedReadWrite");
655 if (!AliasDef->isSubClassOf("SchedRead"))
703 if (!getSchedRWIdx(RWDef, RWDef->isSubClassOf("SchedRead"))) {
734 if (!ReadDef || !ReadDef->isSubClassOf("ProcReadAdvance"))
748 if (RWDef->isSubClassOf("SchedWrite"))
751 assert(RWDef->isSubClassOf("SchedRead") && "unknown SchedReadWrite");
1481 if (Variant.VarOrSeqDef->isSubClassOf("SchedVar")) {
1516 if (VInfo.VarOrSeqDef->isSubClassOf("SchedVar")) {
1523 assert(VInfo.VarOrSeqDef->isSubClassOf("WriteSequence") &&
1740 if (!PM.ProcResourceDefs[i]->isSubClassOf("ProcResGroup"))
1759 if (!PM.ProcResourceDefs[i]->isSubClassOf("ProcResGroup"))
1764 if (!PM.ProcResourceDefs[j]->isSubClassOf("ProcResGroup"))
1904 if ((*RI)->isSubClassOf("WriteRes"))
1912 if ((*RI)->isSubClassOf("ReadAdvance"))
2013 if (!IsRead && SchedRW.TheDef->isSubClassOf("SchedWriteRes")) {
2017 else if (IsRead && SchedRW.TheDef->isSubClassOf("SchedReadAdvance")) {
2058 if (ProcResKind->isSubClassOf("ProcResourceUnits"))
2107 if (ProcResUnits->isSubClassOf("ProcResGroup"))
utils/TableGen/CodeGenSchedule.h 62 IsRead = Def->isSubClassOf("SchedRead");
63 HasVariants = Def->isSubClassOf("SchedVariant");
70 IsSequence = Def->isSubClassOf("WriteSequence");
521 bool IsRead = Def->isSubClassOf("SchedRead");
utils/TableGen/CodeGenTarget.cpp 667 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
669 if (TyEl->isSubClassOf("LLVMMatchType"))
684 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
686 if (TyEl->isSubClassOf("LLVMMatchType")) {
694 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
695 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
715 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
717 if (TyEl->isSubClassOf("LLVMMatchType")) {
730 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
731 !TyEl->isSubClassOf("LLVMTruncatedType") &&
732 !TyEl->isSubClassOf("LLVMScalarOrSameVectorWidth")) ||
751 assert(Property->isSubClassOf("IntrinsicProperty") &&
785 else if (Property->isSubClassOf("NoCapture")) {
788 } else if (Property->isSubClassOf("NoAlias")) {
791 } else if (Property->isSubClassOf("Returned")) {
794 } else if (Property->isSubClassOf("ReadOnly")) {
797 } else if (Property->isSubClassOf("WriteOnly")) {
800 } else if (Property->isSubClassOf("ReadNone")) {
803 } else if (Property->isSubClassOf("ImmArg")) {
utils/TableGen/DAGISelEmitter.cpp 46 if (Op->isSubClassOf("Instruction")) {
65 if (Op->isSubClassOf("Instruction")) {
utils/TableGen/DAGISelMatcherGen.cpp 234 if (LeafRec->isSubClassOf("ValueType")) {
243 LeafRec->isSubClassOf("RegisterClass") ||
244 LeafRec->isSubClassOf("RegisterOperand") ||
245 LeafRec->isSubClassOf("PointerLikeRegClass") ||
246 LeafRec->isSubClassOf("SubRegIndex") ||
253 if (LeafRec->isSubClassOf("Register")) {
260 if (LeafRec->isSubClassOf("CondCode"))
263 if (LeafRec->isSubClassOf("ComplexPattern")) {
310 if (N->getOperator()->isSubClassOf("ComplexPattern")) {
680 if (Def->isSubClassOf("Register")) {
707 if (Def->isSubClassOf("RegisterOperand"))
709 if (Def->isSubClassOf("RegisterClass")) {
717 if (Def->isSubClassOf("SubRegIndex")) {
745 if (!OpRec->isSubClassOf("Instruction"))
832 if (OperandNode->isSubClassOf("Operand")) {
847 if (!Child->isLeaf() && Child->getOperator()->isSubClassOf("Instruction"))
902 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue;
975 assert(N->getOperator()->isSubClassOf("SDNodeXForm") && "Not SDNodeXForm?");
1003 if (OpRec->isSubClassOf("Instruction"))
1005 if (OpRec->isSubClassOf("SDNodeXForm"))
1036 if (!DstPat->isLeaf() &&DstPat->getOperator()->isSubClassOf("Instruction")){
1045 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue;
utils/TableGen/DFAEmitter.cpp 271 assert(T->isSubClassOf("Transition"));
utils/TableGen/FastISelEmitter.cpp 265 if (OpLeafRec->isSubClassOf("RegisterOperand"))
267 if (OpLeafRec->isSubClassOf("RegisterClass"))
269 else if (OpLeafRec->isSubClassOf("Register"))
271 else if (OpLeafRec->isSubClassOf("ValueType")) {
437 if (!OpLeafRec->isSubClassOf("Register"))
460 if (!Op->isSubClassOf("Instruction"))
479 if (ChildOp->getOperator()->isSubClassOf("Instruction")) {
493 if (Op0Rec->isSubClassOf("RegisterOperand"))
495 if (!Op0Rec->isSubClassOf("RegisterClass"))
utils/TableGen/FixedLenDecoderEmitter.cpp 1781 if (Record->isSubClassOf("RegisterOperand"))
1784 if (Record->isSubClassOf("RegisterClass")) {
1786 } else if (Record->isSubClassOf("PointerLikeRegClass")) {
1952 if (TypeRecord->isSubClassOf("RegisterOperand"))
1954 if (TypeRecord->isSubClassOf("RegisterClass")) {
1957 } else if (TypeRecord->isSubClassOf("PointerLikeRegClass")) {
utils/TableGen/GICombinerEmitter.cpp 109 if (OpI->getDef()->isSubClassOf(Cls))
utils/TableGen/GlobalISelEmitter.cpp 279 if (Operator->isSubClassOf("SDNode"))
282 if (Operator->isSubClassOf("Intrinsic"))
285 if (Operator->isSubClassOf("ComplexPattern"))
290 if (Operator->isSubClassOf("SDNodeXForm"))
376 if (VDefInit->getDef()->isSubClassOf("RegisterOperand"))
378 if (VDefInit->getDef()->isSubClassOf("RegisterClass"))
3698 if (!CCDef || !CCDef->isSubClassOf("CondCode"))
3777 if (ChildRec->isSubClassOf("Register")) {
3809 if (SrcChild->getOperator()->isSubClassOf("SDNode")) {
3829 if (SrcChild->getOperator()->isSubClassOf("ComplexPattern")) {
3885 if (ChildRec->isSubClassOf("RegisterClass") ||
3886 ChildRec->isSubClassOf("RegisterOperand")) {
3892 if (ChildRec->isSubClassOf("Register")) {
3907 if (ChildRec->isSubClassOf("ValueType")) {
3914 if (ChildRec->isSubClassOf("ComplexPattern"))
3917 if (ChildRec->isSubClassOf("ImmLeaf")) {
3943 if (DstChild->getOperator()->isSubClassOf("SDNodeXForm")) {
3956 if (DstChild->getOperator()->isSubClassOf("SDNode")) {
3980 if (DstChild->getOperator()->isSubClassOf("Instruction")) {
4029 if (ChildRec->isSubClassOf("Register")) {
4034 if (ChildRec->isSubClassOf("RegisterClass") ||
4035 ChildRec->isSubClassOf("RegisterOperand") ||
4036 ChildRec->isSubClassOf("ValueType")) {
4037 if (ChildRec->isSubClassOf("RegisterOperand") &&
4048 if (ChildRec->isSubClassOf("SubRegIndex")) {
4054 if (ChildRec->isSubClassOf("ComplexPattern")) {
4206 if (!DstOp->isSubClassOf("Instruction")) {
4207 if (DstOp->isSubClassOf("ValueType"))
4323 if (DstIOperand.Rec->isSubClassOf("OperandWithDefaultOps")) {
4360 if (DefaultDagOperator->getDef()->isSubClassOf("ValueType")) {
4436 if (!OpRec->isSubClassOf("Instruction"))
4462 if (DstIOpRec->isSubClassOf("RegisterOperand")) {
4468 if (DstIOpRec->isSubClassOf("RegisterClass")) {
4612 if (!DstOp->isSubClassOf("Instruction"))
4677 } else if (DstIOpRec->isSubClassOf("RegisterOperand"))
4679 else if (!DstIOpRec->isSubClassOf("RegisterClass"))
utils/TableGen/InfoByHwMode.cpp 42 if (R->isSubClassOf("PtrValueType"))
112 if (!Rec->isSubClassOf("ValueType"))
115 assert(Rec->isSubClassOf("ValueType") &&
117 if (Rec->isSubClassOf("HwModeSelect"))
198 assert(P.second && P.second->isSubClassOf("InstructionEncoding") &&
utils/TableGen/InstrInfoEmitter.cpp 140 if (OpR->isSubClassOf("RegisterOperand"))
142 if (OpR->isSubClassOf("RegisterClass"))
144 else if (OpR->isSubClassOf("PointerLikeRegClass"))
154 if (OpR->isSubClassOf("PointerLikeRegClass"))
159 if (Op.Rec->isSubClassOf("PredicateOp"))
164 if (Op.Rec->isSubClassOf("OptionalDefOperand"))
410 if ((OpR->isSubClassOf("Operand") ||
411 OpR->isSubClassOf("RegisterOperand") ||
412 OpR->isSubClassOf("RegisterClass")) &&
utils/TableGen/IntrinsicEmitter.cpp 270 if (R->isSubClassOf("LLVMMatchType")) {
273 if (R->isSubClassOf("LLVMExtendedType"))
275 else if (R->isSubClassOf("LLVMTruncatedType"))
277 else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
279 else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) {
286 else if (R->isSubClassOf("LLVMPointerTo"))
288 else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
295 } else if (R->isSubClassOf("LLVMPointerToElt"))
297 else if (R->isSubClassOf("LLVMVectorElementType"))
299 else if (R->isSubClassOf("LLVMSubdivide2VectorType"))
301 else if (R->isSubClassOf("LLVMSubdivide4VectorType"))
303 else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt"))
335 if (R->isSubClassOf("LLVMQualPointerType")) {
376 if (R->isSubClassOf("LLVMMatchType")) {
377 if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
utils/TableGen/PredicateExpander.cpp 64 assert(Reg->isSubClassOf("Register") && "Expected a register Record!");
273 if (Rec->isSubClassOf("MCOpcodeSwitchStatement")) {
279 if (Rec->isSubClassOf("MCReturnStatement")) {
289 if (Rec->isSubClassOf("MCTrue")) {
295 if (Rec->isSubClassOf("MCFalse")) {
301 if (Rec->isSubClassOf("CheckNot")) {
308 if (Rec->isSubClassOf("CheckIsRegOperand"))
311 if (Rec->isSubClassOf("CheckIsImmOperand"))
314 if (Rec->isSubClassOf("CheckRegOperand"))
319 if (Rec->isSubClassOf("CheckRegOperandSimple"))
323 if (Rec->isSubClassOf("CheckInvalidRegOperand"))
326 if (Rec->isSubClassOf("CheckImmOperand"))
331 if (Rec->isSubClassOf("CheckImmOperand_s"))
336 if (Rec->isSubClassOf("CheckImmOperandSimple"))
340 if (Rec->isSubClassOf("CheckSameRegOperand"))
344 if (Rec->isSubClassOf("CheckNumOperands"))
347 if (Rec->isSubClassOf("CheckPseudo"))
350 if (Rec->isSubClassOf("CheckOpcode"))
353 if (Rec->isSubClassOf("CheckAll"))
357 if (Rec->isSubClassOf("CheckAny"))
361 if (Rec->isSubClassOf("CheckFunctionPredicate"))
366 if (Rec->isSubClassOf("CheckNonPortable"))
369 if (Rec->isSubClassOf("TIIPredicate"))
utils/TableGen/PseudoLoweringEmitter.cpp 80 if (DI->getDef()->isSubClassOf("Register") ||
135 if (!Operator->isSubClassOf("Instruction"))
utils/TableGen/RISCVCompressInstEmitter.cpp 133 assert(Reg->isSubClassOf("Register") && "Reg record should be a Register\n");
134 assert(RegClass->isSubClassOf("RegisterClass") && "RegClass record should be"
153 if (DagOpType->isSubClassOf("RegisterClass") &&
154 InstOpType->isSubClassOf("RegisterClass")) {
161 if (DagOpType->isSubClassOf("RegisterClass") ||
162 InstOpType->isSubClassOf("RegisterClass"))
201 if (DI->getDef()->isSubClassOf("Register")) {
229 if (Inst.Operands[i].Rec->isSubClassOf("RegisterClass"))
416 if (!Operator->isSubClassOf("RVInst"))
428 if (!DestOperator->isSubClassOf("RVInst16"))
642 if (Source.Operands[OpNo].Rec->isSubClassOf("RegisterClass"))
683 if (DestOperand.Rec->isSubClassOf("RegisterClass")) {
utils/TableGen/SearchableTableEmitter.cpp 130 return DI->getDef()->isSubClassOf("Intrinsic");
530 if (TypeRec->isSubClassOf("GenericEnum")) {
utils/TableGen/SubtargetEmitter.cpp 627 if (!PRDef->isSubClassOf("ProcResGroup"))
792 if (PRDef->isSubClassOf("ProcResGroup")) {
835 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes"))
853 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes"))
859 if (!WR->isSubClassOf("WriteRes"))
886 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance"))
905 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance"))
911 if (!RA->isSubClassOf("ReadAdvance"))
942 if (PRDef->isSubClassOf("ProcResGroup"))
949 if (SubDef->isSubClassOf("ProcResGroup")) {
963 if (PR == PRDef || !PR->isSubClassOf("ProcResGroup"))
1452 return Rec->isSubClassOf("MCSchedPredicate") &&
1453 Rec->getValueAsDef("Pred")->isSubClassOf("MCTrue");
1481 if (Rec->isSubClassOf("MCSchedPredicate")) {
1518 return Rec->isSubClassOf("MCSchedPredicate");
utils/TableGen/X86EVEX2VEXTablesEmitter.cpp 147 return Rec->isSubClassOf("RegisterClass") ||
148 Rec->isSubClassOf("RegisterOperand");
152 return Rec->isSubClassOf("Operand") &&
157 return Rec->isSubClassOf("Operand") &&
162 if (RegRec->isSubClassOf("RegisterClass"))
164 if (RegRec->isSubClassOf("RegisterOperand"))
179 if (!Inst->TheDef->isSubClassOf("X86Inst"))
utils/TableGen/X86FoldTablesEmitter.cpp 219 if (RegRec->isSubClassOf("RegisterOperand"))
221 if (RegRec->isSubClassOf("RegisterClass"))
230 if (MemRec->isSubClassOf("Operand")) {
282 return Rec->isSubClassOf("RegisterClass") ||
283 Rec->isSubClassOf("RegisterOperand") ||
284 Rec->isSubClassOf("PointerLikeRegClass");
288 return Rec->isSubClassOf("Operand") &&
293 return Rec->isSubClassOf("Operand") &&
587 if (!Inst->TheDef->getNameInit() || !Inst->TheDef->isSubClassOf("X86Inst"))
utils/TableGen/X86RecognizableInstr.cpp 71 if (!Rec->isSubClassOf("X86Inst")) {