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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/TableGen/JSONBackend.cpp 81 obj["def"] = Def->getDef()->getName();
lib/TableGen/Record.cpp 642 return DI->getDef();
892 if (LOp->getDef() != ROp->getDef()) {
892 if (LOp->getDef() != ROp->getDef()) {
1144 Record *Val = RHSd->getDef();
1146 Val = MHSd->getDef();
1733 Record *Def = DI->getDef();
1935 return DefI->getDef();
2214 Defs.push_back(DI->getDef());
2275 return DI->getDef();
2287 return DI->getDef();
lib/TableGen/SetTheory.cpp 214 cast<DefInit>(Expr->getOperator())->getDef()->getRecords();
285 if (const RecVec *Result = expand(Def->getDef()))
287 Elts.insert(Def->getDef());
302 auto I = Operators.find(OpInit->getDef()->getName());
tools/clang/utils/TableGen/ClangDiagnosticsEmitter.cpp 85 std::string CatName = getCategoryFromDiagGroup(Group->getDef(),
171 std::string GroupName = DI->getDef()->getValueAsString("GroupName");
227 const Record *NextDiagGroup = GroupInit->getDef();
246 const Record *NextDiagGroup = GroupInit->getDef();
382 const Record *GroupRec = Group->getDef();
401 if (groupInPedantic(Group->getDef()))
1228 const Record *GroupRec = Group->getDef();
1260 DiagsInGroup.find(DI->getDef()->getValueAsString("GroupName"));
tools/clang/utils/TableGen/ClangOpcodesEmitter.cpp 74 for (auto *Type : TypeClass->getDef()->getValueAsListOfDefs("Types")) {
294 auto Cases = TypeClass->getDef()->getValueAsListOfDefs("Types");
tools/clang/utils/TableGen/ClangOptionDocEmitter.cpp 62 R = G->getDef();
73 Group = SkipFlattened(G->getDef());
79 Aliases[A->getDef()].push_back(R);
98 Group = SkipFlattened(G->getDef());
tools/clang/utils/TableGen/ClangSACheckersEmitter.cpp 32 name = getPackageFullName(DI->getDef());
136 return isHidden(DI->getDef());
tools/clang/utils/TableGen/MveEmitter.cpp 915 return getType(Def->getDef(), Param);
938 Record *Op = cast<DefInit>(D->getOperator())->getDef();
988 Record *Op = cast<DefInit>(D->getOperator())->getDef();
1147 Record *TypeRec = TypeDI->getDef();
1184 Record *MainOp = cast<DefInit>(CodeDag->getOperator())->getDef();
utils/TableGen/AsmMatcherEmitter.cpp 1154 Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
1170 Record *MatchClass = DI->getDef();
1369 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
utils/TableGen/CodeEmitterGen.cpp 272 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
369 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
411 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
utils/TableGen/CodeGenDAGPatterns.cpp 1334 Record *R = DI->getDef();
1545 !static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef()
1552 auto VVT = getValueTypeByHwMode(DI->getDef(), T.getHwModes());
1774 Op = DI->getDef();
1873 return ((DI->getDef() == NDI->getDef())
1873 return ((DI->getDef() == NDI->getDef())
1934 cast<DefInit>(Val)->getDef()->getName() == "node")) {
2226 Rec = DI->getDef();
2243 if (DI && DI->getDef()->isSubClassOf("Operand")) {
2244 DagInit *MIOps = DI->getDef()->getValueAsDag("MIOperandInfo");
2307 if (DI && DI->getDef()->isSubClassOf(Class))
2341 MadeChange |= UpdateNodeType(i, getImplicitType(DI->getDef(), i,
2537 Record *SubRec = cast<DefInit>(MIOpInfo->getArg(0))->getDef();
2550 SubRec = cast<DefInit>(MIOpInfo->getArg(Arg))->getDef();
2701 Record *R = DI->getDef();
2757 Record *Operator = OpDef->getDef();
2953 if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
2954 DI->getDef()->isSubClassOf("RegisterOperand")))
3132 (OpsOp->getDef()->getName() != "ops" &&
3133 OpsOp->getDef()->getName() != "outs" &&
3134 OpsOp->getDef()->getName() != "ins"))
3141 cast<DefInit>(OpsList->getArg(j))->getDef()->getName() != "node")
3243 if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
3244 DI->getDef()->isSubClassOf("RegisterOperand")))
3245 I.error("Input " + DI->getDef()->getName() + " must be named!");
3255 Rec = DI->getDef();
3271 SlotRec = cast<DefInit>(Slot->getLeafValue())->getDef();
3322 if (!Val || !Val->getDef()->isSubClassOf("Register"))
3324 InstImpResults.push_back(Val->getDef());
3374 if (Val->getDef()->isSubClassOf("RegisterClass") ||
3375 Val->getDef()->isSubClassOf("ValueType") ||
3376 Val->getDef()->isSubClassOf("RegisterOperand") ||
3377 Val->getDef()->isSubClassOf("PointerLikeRegClass")) {
3383 } else if (Val->getDef()->isSubClassOf("Register")) {
3384 InstImpResults.push_back(Val->getDef());
3440 Record *LeafRec = DI->getDef();
3545 Record *Operator = OpDef->getDef();
3675 Record *R = cast<DefInit>(RNode->getLeafValue())->getDef();
3719 Record *InRec = static_cast<DefInit*>(InVal->getLeafValue())->getDef();
3864 Preds.push_back(Pred->getDef());
4545 Record *RR = DI->getDef();
utils/TableGen/CodeGenInstruction.cpp 35 if (Init->getDef()->getName() != "outs")
47 if (Init->getDef()->getName() != "ins")
75 Record *Rec = Arg->getDef();
97 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops")
511 return Constraint->getDef()->isSubClassOf("TypedOperand") &&
512 Constraint->getDef()->getValueAsBit("IsPointer");
533 Record *ResultRecord = ADI ? ADI->getDef() : nullptr;
535 if (ADI && ADI->getDef() == InstOpRec) {
550 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand"))
551 ADI = ADI->getDef()->getValueAsDef("RegClass")->getDefInit();
553 if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) {
557 .hasSubClass(&T.getRegisterClass(ADI->getDef())))
564 if (ADI && ADI->getDef()->isSubClassOf("Register")) {
569 InstOpRec = cast<DefInit>(DI->getArg(0))->getDef();
576 .contains(T.getRegBank().getReg(ADI->getDef())))
577 PrintFatalError(Loc, "fixed register " + ADI->getDef()->getName() +
590 if (ADI && ADI->getDef()->getName() == "zero_reg") {
636 ADI->getDef()->isSubClassOf("Operand")) {
639 if (InstOpRec->getValueInit("Type") != ADI->getDef()->getValueInit("Type"))
641 ResOp = ResultOperand(Result->getArgNameStr(AliasOpNo), ADI->getDef());
673 if (!DI || !DI->getDef()->isSubClassOf("Instruction"))
677 ResultInst = &T.getInstruction(DI->getDef());
690 if (Entry && Entry != ADI->getDef())
693 ADI->getDef()->getName() + "!");
694 Entry = ADI->getDef();
736 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
757 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
utils/TableGen/CodeGenRegisters.cpp 793 RSI = RegSizeInfoByHwMode(DI->getDef(), RegBank.getHwModes());
utils/TableGen/DAGISelMatcherGen.cpp 230 Record *LeafRec = DI->getDef();
679 Record *Def = DI->getDef();
utils/TableGen/FastISelEmitter.cpp 261 Record *OpLeafRec = OpDI->getDef();
436 Record *OpLeafRec = cast<DefInit>(Op->getLeafValue())->getDef();
507 SubRegNo = getQualifiedName(SR->getDef());
utils/TableGen/FixedLenDecoderEmitter.cpp 1770 Record *Record = cast<DefInit>(TI)->getDef();
1948 TypeRecord = DI->getDef();
2026 Record *TypeRecord = cast<DefInit>(TI)->getDef();
2400 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
2418 EncodingInfoByHwMode EBM(DI->getDef(), HWM);
utils/TableGen/GICombinerEmitter.cpp 98 if (OpI->getDef()->getName() == Def)
109 if (OpI->getDef()->isSubClassOf(Cls))
110 return OpI->getDef();
utils/TableGen/GlobalISelEmitter.cpp 376 if (VDefInit->getDef()->isSubClassOf("RegisterOperand"))
377 return VDefInit->getDef()->getValueAsDef("RegClass");
378 if (VDefInit->getDef()->isSubClassOf("RegisterClass"))
379 return VDefInit->getDef();
3697 Record *CCDef = DI ? DI->getDef() : nullptr;
3776 auto *ChildRec = ChildDefInit->getDef();
3882 auto *ChildRec = ChildDefInit->getDef();
4017 auto *ChildRec = ChildDefInit->getDef();
4255 CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
4291 CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
4360 if (DefaultDagOperator->getDef()->isSubClassOf("ValueType")) {
4362 DefaultDagOperator->getDef()));
4369 auto Def = DefaultDefOp->getDef();
4488 CodeGenSubRegIndex *SubIdx = CGRegs.getSubRegIdx(SubRegInit->getDef());
4523 return CGRegs.getSubRegIdx(SubRegInit->getDef());
utils/TableGen/InstrDocsEmitter.cpp 165 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef();
utils/TableGen/InstrInfoEmitter.cpp 131 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef();
384 OperandRecords.push_back(cast<DefInit>(Arg)->getDef());
utils/TableGen/OptParserEmitter.cpp 182 OS << getOptionName(*DI->getDef());
230 GroupFlags = DI->getDef()->getValueAsListInit("Flags");
231 OS << getOptionName(*DI->getDef());
238 OS << getOptionName(*DI->getDef());
263 << cast<DefInit>(I)->getDef()->getName();
267 << cast<DefInit>(I)->getDef()->getName();
utils/TableGen/PseudoLoweringEmitter.cpp 80 if (DI->getDef()->isSubClassOf("Register") ||
81 DI->getDef()->getName() == "zero_reg") {
83 OperandMap[BaseIdx + i].Data.Reg = DI->getDef();
92 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec)
94 "Pseudo operand type '" + DI->getDef()->getName() +
134 Record *Operator = OpDef->getDef();
utils/TableGen/RISCVCompressInstEmitter.cpp 201 if (DI->getDef()->isSubClassOf("Register")) {
203 if (!validateRegister(DI->getDef(), Inst.Operands[i].Rec))
206 "'Register: '" + DI->getDef()->getName() +
210 OperandMap[i].Data.Reg = DI->getDef();
217 if (!validateTypes(DI->getDef(), Inst.Operands[i].Rec, IsSourceInst))
221 DI->getDef()->getName() +
284 return Type1->getDef() == Type2->getDef();
284 return Type1->getDef() == Type2->getDef();
utils/TableGen/RegisterInfoEmitter.cpp 450 Record *Alias = DI->getDef();
utils/TableGen/SearchableTableEmitter.cpp 123 return Field.Enum->EntryMap[cast<DefInit>(I)->getDef()]->first;
130 return DI->getDef()->isSubClassOf("Intrinsic");
137 Intr = std::make_unique<CodeGenIntrinsic>(cast<DefInit>(I)->getDef());
232 Record *LHSr = cast<DefInit>(LHSI)->getDef();
233 Record *RHSr = cast<DefInit>(RHSI)->getDef();
248 auto LHSr = cast<DefInit>(LHSI)->getDef();
249 auto RHSr = cast<DefInit>(RHSI)->getDef();
529 Record *TypeRec = DI->getDef();