|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc72710 uint64_t V = N->getZExtValue();return isUInt<8>(V) && V > 31;
73166 assert(isUInt<8>(V));
gen/lib/Target/Mips/MipsGenDAGISel.inc30256 return isUInt<8>(Imm);
gen/lib/Target/Mips/MipsGenGlobalISel.inc 507 return isUInt<8>(Imm);
594 return isUInt<8>(Imm);
gen/lib/Target/PowerPC/PPCGenDAGISel.inc44472 return (isInt<8>(Imm) && (Imm != -1)) || (isUInt<8>(Imm) && (Imm != 0xFF));
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc30173 return isUInt<8>(N->getZExtValue());
include/llvm/ADT/PointerEmbeddedInt.h 64 assert((std::is_signed<IntT>::value ? isInt<Bits>(I) : isUInt<Bits>(I)) &&
include/llvm/Bitstream/BitstreamWriter.h 394 assert(isUInt<8>(B) && "Value too large to emit as byte");
include/llvm/Support/MathExtras.h 398 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
lib/MC/MCDwarf.cpp 1924 } else if (isUInt<8>(AddrDelta)) {
lib/MC/MCParser/AsmParser.cpp 5695 if (!isUInt<8>(IntValue) && !isInt<8>(IntValue))
lib/Target/AArch64/AArch64CompressJumpTables.cpp 121 if (isUInt<8>(Span / 4)) {
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 1155 (OffsetBits == 8 && !isUInt<8>(Offset)))
1264 if (isUInt<8>(DWordOffset0)) {
1300 if (isUInt<8>(DWordOffset0) && isUInt<8>(DWordOffset1)) {
1300 if (isUInt<8>(DWordOffset0) && isUInt<8>(DWordOffset1)) {
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 2096 (OffsetBits == 8 && !isUInt<8>(Offset)))
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 327 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<8>(getImm()); }
328 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); }
339 bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<8>(getImm()); }
5966 return isImm() && isUInt<8>(getImm());
5976 return isImm() && !isUInt<8>(getImm()) && isUInt<32>(getImm());
lib/Target/AMDGPU/SIISelLowering.cpp 1169 if (!isUInt<8>(AM.BaseOffs / 4))
lib/Target/AMDGPU/SILoadStoreOptimizer.cpp 701 isUInt<8>(EltOffset0 / 64) && isUInt<8>(EltOffset1 / 64)) {
701 isUInt<8>(EltOffset0 / 64) && isUInt<8>(EltOffset1 / 64)) {
709 if (isUInt<8>(EltOffset0) && isUInt<8>(EltOffset1)) {
709 if (isUInt<8>(EltOffset0) && isUInt<8>(EltOffset1)) {
719 if ((OffsetDiff % 64 == 0) && isUInt<8>(OffsetDiff / 64)) {
726 if (isUInt<8>(OffsetDiff)) {
896 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) &&
896 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) &&
994 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) &&
994 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) &&
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp 1255 isUInt<20>(EncodedOffset) : isUInt<8>(EncodedOffset);
lib/Target/ARM/ARMISelLowering.cpp14931 return isUInt<8>(V);
14966 return isUInt<8>(V);
lib/Target/AVR/AVRISelLowering.cpp 1809 if (isUInt<8>(C->getZExtValue())) {
1958 if (!isUInt<8>(CUVal64))
lib/Target/AVR/AsmParser/AVRAsmParser.cpp 176 return isUInt<8>(Value);
lib/Target/Hexagon/HexagonHardwareLoops.cpp 1599 return isUInt<8>(Imm);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 357 assert(isUInt<8>(W));
lib/Target/Mips/AsmParser/MipsAsmParser.cpp 1259 return isConstantImm() && isUInt<Bits>(getConstantImm() - Offset);
lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp 535 if (!isUInt<8>(Type))
lib/Target/Mips/Mips16ISelLowering.cpp 732 if (isUInt<8>(imm))
747 if (isUInt<8>(Imm))
lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp 324 bool isU8Imm() const { return Kind == Immediate && isUInt<8>(getImm()); }
326 isUInt<8>(getImm()) &&
403 bool isCRBitMask() const { return Kind == Immediate && isUInt<8>(getImm()) &&
lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp 182 assert(isUInt<N>(Imm) && "Invalid immediate");
lib/Target/PowerPC/PPCRegisterInfo.cpp 1079 isUInt<8>(Offset) :
lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp 173 assert(isUInt<N>(Imm) && "Invalid immediate");
lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp 173 if (!isUInt<N>(Imm))
181 if (!isUInt<N>(Imm))
lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp 68 assert(isUInt<N>(Value) && "Invalid uimm argument");
lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp 243 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<8>(Len));
lib/Target/SystemZ/SystemZISelLowering.cpp 1021 if (isUInt<8>(C->getZExtValue()))
1160 if (isUInt<8>(C->getZExtValue()))
lib/Target/SystemZ/SystemZInstrInfo.cpp 1609 if (!(MI && isUInt<8>(MI->getOperand(1).getImm())))
lib/Target/X86/AsmParser/X86AsmParserCommon.h 35 return isUInt<8>(Value) || isInt<8>(Value);
lib/Target/X86/X86ISelDAGToDAG.cpp 5050 if (isUInt<8>(Mask) &&
lib/Target/X86/X86ISelLowering.cpp20403 if ((!isUInt<32>(AndRHSVal) || (OptForSize && !isUInt<8>(AndRHSVal))) &&