reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
615 auto GV = MIB->getOperand(1).getGlobal(); 621 auto &MBB = *MIB->getParent(); 676 MIB->setDesc(TII.get(Opc)); 683 MIB->getOperand(1).setTargetFlags(TargetFlags); 687 auto ResultReg = MIB->getOperand(0).getReg(); 690 MIB->getOperand(0).setReg(AddressReg); 692 auto InsertBefore = std::next(MIB->getIterator()); 693 auto MIBLoad = BuildMI(MBB, InsertBefore, MIB->getDebugLoc(), 704 addGOTMemOperand(MIB); 708 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); 714 MIB->setDesc(TII.get(Opc)); 715 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); 721 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), 721 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), 726 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), 726 OffsetMIB = BuildMI(MBB, *MIB, MIB->getDebugLoc(), 734 MIB->setDesc(TII.get(Opcodes.ADDrr)); 735 MIB->RemoveOperand(1); 736 MIB.addReg(ARM::R9) // FIXME: don't hardcode R9 741 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); 746 MIB->setDesc(TII.get(Opcodes.MOVi32imm)); 749 MIB->setDesc(TII.get(Opcodes.ConstPoolLoad)); 750 MIB->RemoveOperand(1); 751 addOpsForConstantPoolLoad(MIB, GV, /*IsSBREL*/ false); 755 MIB->setDesc(TII.get(Opcodes.MOVi32imm)); 757 MIB->setDesc(TII.get(Opcodes.LDRLIT_ga_abs)); 763 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);