reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

lib/Target/ARM/ARMBaseInstrInfo.h

  234   const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,

References

lib/Target/ARM/ARMBaseInstrInfo.cpp

 1088           AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
 1089           AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
 1099           AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
 1100           AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
 1150           MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
 1151           MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI);
 1152           AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI);
 1175           MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
 1176           MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI);
 1177           MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI);
 1178                 AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI);
 1189         MIB = AddDReg(MIB, SrcReg, ARM::dsub_0, getKillRegState(isKill), TRI);
 1190         MIB = AddDReg(MIB, SrcReg, ARM::dsub_1, 0, TRI);
 1191         MIB = AddDReg(MIB, SrcReg, ARM::dsub_2, 0, TRI);
 1192         MIB = AddDReg(MIB, SrcReg, ARM::dsub_3, 0, TRI);
 1193         MIB = AddDReg(MIB, SrcReg, ARM::dsub_4, 0, TRI);
 1194         MIB = AddDReg(MIB, SrcReg, ARM::dsub_5, 0, TRI);
 1195         MIB = AddDReg(MIB, SrcReg, ARM::dsub_6, 0, TRI);
 1196               AddDReg(MIB, SrcReg, ARM::dsub_7, 0, TRI);
 1327         AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
 1328         AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);
 1338         MIB = AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
 1339         MIB = AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);
 1385         MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::DefineNoRead, TRI);
 1386         MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::DefineNoRead, TRI);
 1387         MIB = AddDReg(MIB, DestReg, ARM::dsub_2, RegState::DefineNoRead, TRI);
 1408         MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::DefineNoRead, TRI);
 1409         MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::DefineNoRead, TRI);
 1410         MIB = AddDReg(MIB, DestReg, ARM::dsub_2, RegState::DefineNoRead, TRI);
 1411         MIB = AddDReg(MIB, DestReg, ARM::dsub_3, RegState::DefineNoRead, TRI);
 1424       MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::DefineNoRead, TRI);
 1425       MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::DefineNoRead, TRI);
 1426       MIB = AddDReg(MIB, DestReg, ARM::dsub_2, RegState::DefineNoRead, TRI);
 1427       MIB = AddDReg(MIB, DestReg, ARM::dsub_3, RegState::DefineNoRead, TRI);
 1428       MIB = AddDReg(MIB, DestReg, ARM::dsub_4, RegState::DefineNoRead, TRI);
 1429       MIB = AddDReg(MIB, DestReg, ARM::dsub_5, RegState::DefineNoRead, TRI);
 1430       MIB = AddDReg(MIB, DestReg, ARM::dsub_6, RegState::DefineNoRead, TRI);
 1431       MIB = AddDReg(MIB, DestReg, ARM::dsub_7, RegState::DefineNoRead, TRI);

lib/Target/ARM/Thumb2InstrInfo.cpp

  168     AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
  169     AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
  209     AddDReg(MIB, DestReg, ARM::gsub_0, RegState::DefineNoRead, TRI);
  210     AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);