reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc

79457  (void) N; return TM.Options.NoNaNsFPMath; 
79463  (void)N; return TM.Options.NoNaNsFPMath;

gen/lib/Target/Mips/MipsGenDAGISel.inc

29937   case 112: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29938   case 113: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29939   case 114: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29947   case 122: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29948   case 123: return (!Subtarget->disableMadd4()) && (Subtarget->inMicroMipsMode()) && (Subtarget->inMicroMipsMode()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips32r6());
29949   case 124: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29950   case 125: return (!Subtarget->disableMadd4()) && (Subtarget->hasMips4_32r2()) && (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->inMicroMipsMode()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips64r6());
29951   case 126: return (!Subtarget->disableMadd4()) && (Subtarget->inMicroMipsMode()) && (Subtarget->inMicroMipsMode()) && (TM.Options.NoNaNsFPMath) && (!Subtarget->isFP64bit()) && (!Subtarget->hasMips32r6()) && (!Subtarget->hasMips32r6());
29954   case 129: return (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath);
29955   case 130: return (Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath);
29956   case 131: return (Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath);
29957   case 132: return (Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath);

gen/lib/Target/Mips/MipsGenFastISel.inc

  318   if ((Subtarget->inMicroMipsMode()) && (!Subtarget->useSoftFloat()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath)) {
  321   if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath)) {
  336   if ((Subtarget->hasStandardEncoding()) && (Subtarget->isFP64bit()) && (!Subtarget->useSoftFloat()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath)) {
  339   if ((Subtarget->hasStandardEncoding()) && (!Subtarget->useSoftFloat()) && (!Subtarget->isFP64bit()) && (!Subtarget->inMicroMipsMode()) && (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath)) {

gen/lib/Target/Mips/MipsGenGlobalISel.inc

  133   if (TM.Options.NoNaNsFPMath)
  135   if (Subtarget->inAbs2008Mode() ||TM.Options.NoNaNsFPMath)

gen/lib/Target/PowerPC/PPCGenDAGISel.inc

44077   case 47: return (PPCSubTarget->hasQPX()) && (TM.Options.NoNaNsFPMath);
44078   case 48: return (PPCSubTarget->hasQPX()) && (!TM.Options.NoNaNsFPMath);

include/llvm/CodeGen/CommandFlags.inc

  286   Options.NoNaNsFPMath = EnableNoNaNsFPMath;

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

11990   if ((Options.NoNaNsFPMath || Flags.hasNoNaNs()) && AllowNewConst) {
12130     if (Options.NoNaNsFPMath || Flags.hasNoNaNs())
12219   if ((Options.NoNaNsFPMath && Options.NoSignedZerosFPMath) ||

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3754   bool CanUseFiniteLibCall = TM.Options.NoInfsFPMath && TM.Options.NoNaNsFPMath;

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 3982   if (getTarget().Options.NoNaNsFPMath || Op->getFlags().hasNoNaNs())

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 2051         if (TM.Options.NoNaNsFPMath)
 3234   if ((FPMO && FPMO->hasNoNaNs()) || TM.Options.NoNaNsFPMath)

lib/Target/AArch64/AArch64ISelLowering.cpp

 8186   bool NoNaNs = getTargetMachine().Options.NoNaNsFPMath;

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  507   if (TM.Options.NoNaNsFPMath)

lib/Target/AMDGPU/AMDGPULibCalls.cpp

 1727   if (Options.UnsafeFPMath || Options.NoNaNsFPMath)

lib/Target/ARM/ARMAsmPrinter.cpp

  702   if (TM.Options.NoInfsFPMath && TM.Options.NoNaNsFPMath)

lib/Target/Mips/MipsISelLowering.cpp

  363   if (!(TM.Options.NoNaNsFPMath || Subtarget.inAbs2008Mode())) {

lib/Target/PowerPC/PPCISelLowering.cpp

 7227   bool HasNoNaNs = DAG.getTarget().Options.NoNaNsFPMath;

lib/Target/TargetMachine.cpp

   64   RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math");

lib/Target/X86/X86ISelLowering.cpp

41932   if (DAG.getTarget().Options.NoNaNsFPMath || N->getFlags().hasNoNaNs())

tools/clang/lib/CodeGen/BackendUtil.cpp

  475   Options.NoNaNsFPMath = CodeGenOpts.NoNaNsFPMath;