reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/IR/Constants.cpp

 1309   return isIntN(NumBits, Val);

lib/MC/MCObjectStreamer.cpp

  201     if (!isUIntN(8 * Size, AbsValue) && !isIntN(8 * Size, AbsValue)) {

lib/MC/MCParser/AsmParser.cpp

 3058       if (!isUIntN(8 * Size, IntValue) && !isIntN(8 * Size, IntValue))
 4759     if (!isUIntN(8 * Size, IntValue) && !isIntN(8 * Size, IntValue))

lib/MC/MCStreamer.cpp

  133   assert((isUIntN(8 * Size, Value) || isIntN(8 * Size, Value)) &&

lib/Target/AArch64/AArch64ISelLowering.cpp

 2660         if (!isIntN(HalfSize, C->getSExtValue()))

lib/Target/AArch64/AArch64InstrInfo.cpp

  183   return isIntN(Bits, BrOffset / 4);

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

 1523   return isUIntN(Size, Val) || isIntN(Size, Val);
 3284     if (!isIntN(OffsetSize, Op.getImm())) {

lib/Target/AMDGPU/SIInstrInfo.cpp

 1753   return isIntN(BranchOffsetBits, BrOffset);

lib/Target/ARM/ARMISelLowering.cpp

 8251         if (!isIntN(HalfSize, C->getSExtValue()))

lib/Target/AVR/AVRInstrInfo.cpp

  543     return isIntN(13, BrOffset);
  554     return isIntN(7, BrOffset);

lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

   39   if (!isIntN(Width, Value)) {

lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

  707       if (!isUIntN(Size, IntValue) && !isIntN(Size, IntValue))

lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp

  442         if (!(isIntN(7, sValue)))
  452         if (!(isIntN(9, sValue)))
  464         if (!(isIntN(13, sValue)))
  475         if (!(isIntN(15, sValue)))
  487         if (!(isIntN(22, sValue)))

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 1322         (isConstantMemOff() && isIntN(PtrBits, getConstantMemOff())))
 1326     return IsReloc && isIntN(PtrBits, Res.getConstant());
 1811       if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm()))
 1841       if (!isIntN(inMicroMipsMode() ? 17 : 18, Offset.getImm()))
 1857       if (!isIntN(18, Offset.getImm()))
 1870       if (!isIntN(18, Offset.getImm()))
 1881       if (!isIntN(23, Offset.getImm()))

lib/Target/Mips/MipsSEFrameLowering.cpp

  908   if (isIntN(STI.hasMSA() ? 10 : 16, MaxSPOffset) &&

lib/Target/Mips/MipsSEISelDAGToDAG.cpp

  284     if (isIntN(OffsetBits + ShiftAmount, CN->getSExtValue())) {

lib/Target/Mips/MipsSERegisterInfo.cpp

  217         (!isIntN(OffsetBitSize, Offset) || !isAligned(OffsetAlign, Offset))) {

lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

 1658       if (!isUIntN(8 * Size, IntValue) && !isIntN(8 * Size, IntValue))

lib/Target/RISCV/RISCVInstrInfo.cpp

  443     return isIntN(13, BrOffset);
  446     return isIntN(21, BrOffset);

lib/Target/X86/AsmParser/X86AsmParser.cpp

 3408           (isIntN(Size, CE->getValue()) || isUIntN(Size, CE->getValue()))) {

lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

  121     assert((Size == 0 || isIntN(Size * 8 + 1, Value)) &&

lib/Transforms/Utils/SimplifyLibCalls.cpp

  135   if (!isIntN(CI->getType()->getPrimitiveSizeInBits(), Result))

unittests/Support/MathExtrasTest.cpp

  134   EXPECT_TRUE(isIntN(16, 32767));
  135   EXPECT_FALSE(isIntN(16, 32768));