reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenCallingConv.inc

  188       LocVT == MVT::nxv16i1) {
  201       LocVT == MVT::nxv16i1) {
 1182       LocVT == MVT::nxv16i1) {

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

82241 /*191220*/        OPC_CheckChild2Type, MVT::nxv16i1,
82289 /*191311*/        OPC_CheckChild2Type, MVT::nxv16i1,
82337 /*191403*/        OPC_CheckChild2Type, MVT::nxv16i1,
82410 /*191542*/        OPC_CheckChild1Type, MVT::nxv16i1,
82435 /*191588*/        OPC_CheckChild1Type, MVT::nxv16i1,
111856 /*249704*/      OPC_CheckChild2Type, MVT::nxv16i1,

gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc

 5186   /* 34 */ MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::Other,

include/llvm/Support/MachineValueType.h

  443       case nxv16i1:
  592       case nxv16i1:
  710       case nxv16i1:
 1007           if (NumElements == 16) return MVT::nxv16i1;

lib/CodeGen/ValueTypes.cpp

  217   case MVT::nxv16i1: return "nxv16i1";
  365   case MVT::nxv16i1:

lib/Target/AArch64/AArch64ISelLowering.cpp

  170     addRegisterClass(MVT::nxv16i1, &AArch64::PPRRegClass);

unittests/Target/AArch64/TestStackOffset.cpp

  109   StackOffset D(1, MVT::nxv16i1);
  116   StackOffset F(1, MVT::nxv16i1);
  126   StackOffset H(1, MVT::nxv16i1);

utils/TableGen/CodeGenTarget.cpp

  157   case MVT::nxv16i1:  return "MVT::nxv16i1";