reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/AtomicExpandUtils.h
   18 class AtomicRMWInst;
include/llvm/IR/Instruction.def
  177 HANDLE_MEMORY_INST(37, AtomicRMW , AtomicRMWInst )
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
   47 class AtomicRMWInst;

References

include/llvm/Analysis/AliasAnalysis.h
  575   ModRefInfo getModRefInfo(const AtomicRMWInst *RMW, const MemoryLocation &Loc);
  578   ModRefInfo getModRefInfo(const AtomicRMWInst *RMW, const Value *P,
  713   ModRefInfo getModRefInfo(const AtomicRMWInst *RMW, const MemoryLocation &Loc,
include/llvm/Analysis/MemoryLocation.h
  203   static MemoryLocation get(const AtomicRMWInst *RMWI);
  218       return get(cast<AtomicRMWInst>(Inst));
include/llvm/CodeGen/AtomicExpandUtils.h
   60 bool expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun CreateCmpXchg);
include/llvm/CodeGen/TargetLowering.h
 1752                                               AtomicRMWInst *AI,
 1858   virtual AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
 1875   lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *RMWI) const {
include/llvm/IR/IRBuilder.h
  845   InstTy *Insert(InstTy *I, const Twine &Name = "") const {
  845   InstTy *Insert(InstTy *I, const Twine &Name = "") const {
 1686   AtomicRMWInst *CreateAtomicRMW(AtomicRMWInst::BinOp Op, Value *Ptr, Value *Val,
 1686   AtomicRMWInst *CreateAtomicRMW(AtomicRMWInst::BinOp Op, Value *Ptr, Value *Val,
 1689     return Insert(new AtomicRMWInst(Op, Ptr, Val, Ordering, SSID));
include/llvm/IR/InstVisitor.h
  174   RetTy visitAtomicRMWInst(AtomicRMWInst &I)      { DELEGATE(Instruction);}
include/llvm/IR/Instructions.h
  704   AtomicRMWInst *cloneImpl() const;
  766     case AtomicRMWInst::FAdd:
  767     case AtomicRMWInst::FSub:
  861     : public FixedNumOperandTraits<AtomicRMWInst,2> {
include/llvm/IR/OperandTraits.h
   31   static Use *op_begin(SubClass* U) {
   33         !std::is_polymorphic<SubClass>::value,
   37   static Use *op_end(SubClass* U) {
include/llvm/IR/User.h
  127   template <int Idx, typename U> static Use &OpFrom(const U *that) {
  129       ? OperandTraits<U>::op_end(const_cast<U*>(that))[Idx]
  130       : OperandTraits<U>::op_begin(const_cast<U*>(that))[Idx];
include/llvm/Support/Casting.h
   58     return To::classof(&Val);
   77     return isa_impl<To, From>::doit(Val);
   92     return isa_impl<To, From>::doit(*Val);
  106     return isa_impl<To, From>::doit(*Val);
  122     return isa_impl_wrap<To, SimpleFrom,
  132     return isa_impl_cl<To,FromTy>::doit(Val);
  142   return isa_impl_wrap<X, const Y,
  168   using ret_type = const To &; // Normal case, return Ty&
  172   using ret_type = To *;       // Pointer arg case, return Ty*
  176   using ret_type = const To *; // Constant pointer arg case, return const Ty*
  198   using ret_type = typename cast_retty<To, SimpleFrom>::ret_type;
  204   using ret_type = typename cast_retty_impl<To,FromTy>::ret_type;
  210       To, From, typename simplify_type<From>::SimpleType>::ret_type;
  218   static typename cast_retty<To, From>::ret_type doit(From &Val) {
  219     return cast_convert_val<To, SimpleFrom,
  227   static typename cast_retty<To, FromTy>::ret_type doit(const FromTy &Val) {
  228     typename cast_retty<To, FromTy>::ret_type Res2
  248                                typename cast_retty<X, const Y>::ret_type>::type
  256 inline typename cast_retty<X, Y>::ret_type cast(Y &Val) {
  258   return cast_convert_val<X, Y,
  263 inline typename cast_retty<X, Y *>::ret_type cast(Y *Val) {
  265   return cast_convert_val<X, Y*,
  331                             typename cast_retty<X, const Y>::ret_type>::type
  337 LLVM_NODISCARD inline typename cast_retty<X, Y>::ret_type dyn_cast(Y &Val) {
  338   return isa<X>(Val) ? cast<X>(Val) : nullptr;
  338   return isa<X>(Val) ? cast<X>(Val) : nullptr;
  342 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type dyn_cast(Y *Val) {
  343   return isa<X>(Val) ? cast<X>(Val) : nullptr;
  343   return isa<X>(Val) ? cast<X>(Val) : nullptr;
  366 LLVM_NODISCARD inline typename cast_retty<X, Y *>::ret_type
  368   return (Val && isa<X>(Val)) ? cast<X>(Val) : nullptr;
  368   return (Val && isa<X>(Val)) ? cast<X>(Val) : nullptr;
lib/Analysis/AliasAnalysis.cpp
  603 ModRefInfo AAResults::getModRefInfo(const AtomicRMWInst *RMW,
  609 ModRefInfo AAResults::getModRefInfo(const AtomicRMWInst *RMW,
lib/Analysis/CFLGraph.h
  305     void visitAtomicRMWInst(AtomicRMWInst &Inst) {
lib/Analysis/CaptureTracking.cpp
  322       auto *ARMWI = cast<AtomicRMWInst>(I);
  322       auto *ARMWI = cast<AtomicRMWInst>(I);
lib/Analysis/MemoryLocation.cpp
   74 MemoryLocation MemoryLocation::get(const AtomicRMWInst *RMWI) {
lib/Analysis/ValueTracking.cpp
 4365       return cast<AtomicRMWInst>(I)->getPointerOperand();
lib/AsmParser/LLParser.cpp
 7087   AtomicRMWInst::BinOp Operation;
 7094   case lltok::kw_xchg: Operation = AtomicRMWInst::Xchg; break;
 7095   case lltok::kw_add: Operation = AtomicRMWInst::Add; break;
 7096   case lltok::kw_sub: Operation = AtomicRMWInst::Sub; break;
 7097   case lltok::kw_and: Operation = AtomicRMWInst::And; break;
 7098   case lltok::kw_nand: Operation = AtomicRMWInst::Nand; break;
 7099   case lltok::kw_or: Operation = AtomicRMWInst::Or; break;
 7100   case lltok::kw_xor: Operation = AtomicRMWInst::Xor; break;
 7101   case lltok::kw_max: Operation = AtomicRMWInst::Max; break;
 7102   case lltok::kw_min: Operation = AtomicRMWInst::Min; break;
 7103   case lltok::kw_umax: Operation = AtomicRMWInst::UMax; break;
 7104   case lltok::kw_umin: Operation = AtomicRMWInst::UMin; break;
 7106     Operation = AtomicRMWInst::FAdd;
 7110     Operation = AtomicRMWInst::FSub;
 7129   if (Operation == AtomicRMWInst::Xchg) {
 7133                    AtomicRMWInst::getOperationName(Operation) +
 7139                    AtomicRMWInst::getOperationName(Operation) +
 7145                    AtomicRMWInst::getOperationName(Operation) +
 7155   AtomicRMWInst *RMWI =
 7156     new AtomicRMWInst(Operation, Ptr, Val, Ordering, SSID);
lib/Bitcode/Reader/BitcodeReader.cpp
 1109 static AtomicRMWInst::BinOp getDecodedRMWOperation(unsigned Val) {
 1111   default: return AtomicRMWInst::BAD_BINOP;
 1112   case bitc::RMW_XCHG: return AtomicRMWInst::Xchg;
 1113   case bitc::RMW_ADD: return AtomicRMWInst::Add;
 1114   case bitc::RMW_SUB: return AtomicRMWInst::Sub;
 1115   case bitc::RMW_AND: return AtomicRMWInst::And;
 1116   case bitc::RMW_NAND: return AtomicRMWInst::Nand;
 1117   case bitc::RMW_OR: return AtomicRMWInst::Or;
 1118   case bitc::RMW_XOR: return AtomicRMWInst::Xor;
 1119   case bitc::RMW_MAX: return AtomicRMWInst::Max;
 1120   case bitc::RMW_MIN: return AtomicRMWInst::Min;
 1121   case bitc::RMW_UMAX: return AtomicRMWInst::UMax;
 1122   case bitc::RMW_UMIN: return AtomicRMWInst::UMin;
 1123   case bitc::RMW_FADD: return AtomicRMWInst::FAdd;
 1124   case bitc::RMW_FSUB: return AtomicRMWInst::FSub;
 4960       AtomicRMWInst::BinOp Operation = getDecodedRMWOperation(Record[OpNum]);
 4961       if (Operation < AtomicRMWInst::FIRST_BINOP ||
 4962           Operation > AtomicRMWInst::LAST_BINOP)
 4969       I = new AtomicRMWInst(Operation, Ptr, Val, Ordering, SSID);
 4971       cast<AtomicRMWInst>(I)->setVolatile(Record[OpNum+1]);
lib/Bitcode/Writer/BitcodeWriter.cpp
  551 static unsigned getEncodedRMWOperation(AtomicRMWInst::BinOp Op) {
  554   case AtomicRMWInst::Xchg: return bitc::RMW_XCHG;
  555   case AtomicRMWInst::Add: return bitc::RMW_ADD;
  556   case AtomicRMWInst::Sub: return bitc::RMW_SUB;
  557   case AtomicRMWInst::And: return bitc::RMW_AND;
  558   case AtomicRMWInst::Nand: return bitc::RMW_NAND;
  559   case AtomicRMWInst::Or: return bitc::RMW_OR;
  560   case AtomicRMWInst::Xor: return bitc::RMW_XOR;
  561   case AtomicRMWInst::Max: return bitc::RMW_MAX;
  562   case AtomicRMWInst::Min: return bitc::RMW_MIN;
  563   case AtomicRMWInst::UMax: return bitc::RMW_UMAX;
  564   case AtomicRMWInst::UMin: return bitc::RMW_UMIN;
  565   case AtomicRMWInst::FAdd: return bitc::RMW_FADD;
  566   case AtomicRMWInst::FSub: return bitc::RMW_FSUB;
 2978         getEncodedRMWOperation(cast<AtomicRMWInst>(I).getOperation()));
 2979     Vals.push_back(cast<AtomicRMWInst>(I).isVolatile());
 2980     Vals.push_back(getEncodedOrdering(cast<AtomicRMWInst>(I).getOrdering()));
 2982         getEncodedSyncScopeID(cast<AtomicRMWInst>(I).getSyncScopeID()));
lib/CodeGen/AtomicExpandPass.cpp
   79     bool tryExpandAtomicRMW(AtomicRMWInst *AI);
   88         AtomicRMWInst *I,
   90     AtomicRMWInst *widenPartwordAtomicRMW(AtomicRMWInst *AI);
   90     AtomicRMWInst *widenPartwordAtomicRMW(AtomicRMWInst *AI);
   92     void expandAtomicRMWToMaskedIntrinsic(AtomicRMWInst *AI);
  104     bool isIdempotentRMW(AtomicRMWInst *RMWI);
  105     bool simplifyIdempotentRMW(AtomicRMWInst *RMWI);
  114     void expandAtomicRMWToLibcall(AtomicRMWInst *I);
  118     llvm::expandAtomicRMWToCmpXchg(AtomicRMWInst *AI,
  144 static unsigned getAtomicOpSize(AtomicRMWInst *RMWI) {
  173 static unsigned getAtomicOpAlign(AtomicRMWInst *RMWI) {
  191 static bool atomicSizeSupported(const TargetLowering *TLI, Inst *I) {
  221     auto RMWI = dyn_cast<AtomicRMWInst>(I);
  316         AtomicRMWInst::BinOp Op = RMWI->getOperation();
  318             (Op == AtomicRMWInst::Or || Op == AtomicRMWInst::Xor ||
  318             (Op == AtomicRMWInst::Or || Op == AtomicRMWInst::Xor ||
  319              Op == AtomicRMWInst::And)) {
  488   AtomicRMWInst *AI =
  489       Builder.CreateAtomicRMW(AtomicRMWInst::Xchg, SI->getPointerOperand(),
  525 static Value *performAtomicOp(AtomicRMWInst::BinOp Op, IRBuilder<> &Builder,
  529   case AtomicRMWInst::Xchg:
  531   case AtomicRMWInst::Add:
  533   case AtomicRMWInst::Sub:
  535   case AtomicRMWInst::And:
  537   case AtomicRMWInst::Nand:
  539   case AtomicRMWInst::Or:
  541   case AtomicRMWInst::Xor:
  543   case AtomicRMWInst::Max:
  546   case AtomicRMWInst::Min:
  549   case AtomicRMWInst::UMax:
  552   case AtomicRMWInst::UMin:
  555   case AtomicRMWInst::FAdd:
  557   case AtomicRMWInst::FSub:
  564 bool AtomicExpand::tryExpandAtomicRMW(AtomicRMWInst *AI) {
  687 static Value *performMaskedAtomicOp(AtomicRMWInst::BinOp Op,
  695   case AtomicRMWInst::Xchg: {
  700   case AtomicRMWInst::Or:
  701   case AtomicRMWInst::Xor:
  702   case AtomicRMWInst::And:
  704   case AtomicRMWInst::Add:
  705   case AtomicRMWInst::Sub:
  706   case AtomicRMWInst::Nand: {
  714   case AtomicRMWInst::Max:
  715   case AtomicRMWInst::Min:
  716   case AtomicRMWInst::UMax:
  717   case AtomicRMWInst::UMin: {
  743     AtomicRMWInst *AI, TargetLoweringBase::AtomicExpansionKind ExpansionKind) {
  775 AtomicRMWInst *AtomicExpand::widenPartwordAtomicRMW(AtomicRMWInst *AI) {
  775 AtomicRMWInst *AtomicExpand::widenPartwordAtomicRMW(AtomicRMWInst *AI) {
  777   AtomicRMWInst::BinOp Op = AI->getOperation();
  793   if (Op == AtomicRMWInst::And)
  799   AtomicRMWInst *NewAI = Builder.CreateAtomicRMW(Op, PMV.AlignedAddr,
  946 void AtomicExpand::expandAtomicRMWToMaskedIntrinsic(AtomicRMWInst *AI) {
  957   AtomicRMWInst::BinOp RMWOp = AI->getOperation();
  958   if (RMWOp == AtomicRMWInst::Max || RMWOp == AtomicRMWInst::Min)
  958   if (RMWOp == AtomicRMWInst::Max || RMWOp == AtomicRMWInst::Min)
 1316 bool AtomicExpand::isIdempotentRMW(AtomicRMWInst* RMWI) {
 1321   AtomicRMWInst::BinOp Op = RMWI->getOperation();
 1323     case AtomicRMWInst::Add:
 1324     case AtomicRMWInst::Sub:
 1325     case AtomicRMWInst::Or:
 1326     case AtomicRMWInst::Xor:
 1328     case AtomicRMWInst::And:
 1336 bool AtomicExpand::simplifyIdempotentRMW(AtomicRMWInst* RMWI) {
 1430 bool llvm::expandAtomicRMWToCmpXchg(AtomicRMWInst *AI,
 1510 static ArrayRef<RTLIB::Libcall> GetRMWLibcall(AtomicRMWInst::BinOp Op) {
 1541   case AtomicRMWInst::BAD_BINOP:
 1543   case AtomicRMWInst::Xchg:
 1545   case AtomicRMWInst::Add:
 1547   case AtomicRMWInst::Sub:
 1549   case AtomicRMWInst::And:
 1551   case AtomicRMWInst::Or:
 1553   case AtomicRMWInst::Xor:
 1555   case AtomicRMWInst::Nand:
 1557   case AtomicRMWInst::Max:
 1558   case AtomicRMWInst::Min:
 1559   case AtomicRMWInst::UMax:
 1560   case AtomicRMWInst::UMin:
 1561   case AtomicRMWInst::FAdd:
 1562   case AtomicRMWInst::FSub:
 1569 void AtomicExpand::expandAtomicRMWToLibcall(AtomicRMWInst *I) {
lib/CodeGen/CodeGenPrepare.cpp
 4455     if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UserI)) {
 4455     if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UserI)) {
 4457       if (opNo != AtomicRMWInst::getPointerOperandIndex())
 6998   if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
 6998   if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
lib/CodeGen/GlobalISel/IRTranslator.cpp
  259   } else if (const AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(&I)) {
  259   } else if (const AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(&I)) {
 1973   const AtomicRMWInst &I = cast<AtomicRMWInst>(U);
 1973   const AtomicRMWInst &I = cast<AtomicRMWInst>(U);
 1989   case AtomicRMWInst::Xchg:
 1992   case AtomicRMWInst::Add:
 1995   case AtomicRMWInst::Sub:
 1998   case AtomicRMWInst::And:
 2001   case AtomicRMWInst::Nand:
 2004   case AtomicRMWInst::Or:
 2007   case AtomicRMWInst::Xor:
 2010   case AtomicRMWInst::Max:
 2013   case AtomicRMWInst::Min:
 2016   case AtomicRMWInst::UMax:
 2019   case AtomicRMWInst::UMin:
 2022   case AtomicRMWInst::FAdd:
 2025   case AtomicRMWInst::FSub:
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 4587 void SelectionDAGBuilder::visitAtomicRMW(const AtomicRMWInst &I) {
 4592   case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break;
 4593   case AtomicRMWInst::Add:  NT = ISD::ATOMIC_LOAD_ADD; break;
 4594   case AtomicRMWInst::Sub:  NT = ISD::ATOMIC_LOAD_SUB; break;
 4595   case AtomicRMWInst::And:  NT = ISD::ATOMIC_LOAD_AND; break;
 4596   case AtomicRMWInst::Nand: NT = ISD::ATOMIC_LOAD_NAND; break;
 4597   case AtomicRMWInst::Or:   NT = ISD::ATOMIC_LOAD_OR; break;
 4598   case AtomicRMWInst::Xor:  NT = ISD::ATOMIC_LOAD_XOR; break;
 4599   case AtomicRMWInst::Max:  NT = ISD::ATOMIC_LOAD_MAX; break;
 4600   case AtomicRMWInst::Min:  NT = ISD::ATOMIC_LOAD_MIN; break;
 4601   case AtomicRMWInst::UMax: NT = ISD::ATOMIC_LOAD_UMAX; break;
 4602   case AtomicRMWInst::UMin: NT = ISD::ATOMIC_LOAD_UMIN; break;
 4603   case AtomicRMWInst::FAdd: NT = ISD::ATOMIC_LOAD_FADD; break;
 4604   case AtomicRMWInst::FSub: NT = ISD::ATOMIC_LOAD_FSUB; break;
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  728   void visitAtomicRMW(const AtomicRMWInst &I);
lib/IR/AsmWriter.cpp
 3701       (isa<AtomicRMWInst>(I) && cast<AtomicRMWInst>(I).isVolatile()))
 3701       (isa<AtomicRMWInst>(I) && cast<AtomicRMWInst>(I).isVolatile()))
 3712   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I))
 3712   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I))
 3713     Out << ' ' << AtomicRMWInst::getOperationName(RMWI->getOperation());
 4070   } else if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I)) {
 4070   } else if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I)) {
lib/IR/AutoUpgrade.cpp
 3434       Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val,
lib/IR/Core.cpp
 3531 static AtomicRMWInst::BinOp mapFromLLVMRMWBinOp(LLVMAtomicRMWBinOp BinOp) {
 3533     case LLVMAtomicRMWBinOpXchg: return AtomicRMWInst::Xchg;
 3534     case LLVMAtomicRMWBinOpAdd: return AtomicRMWInst::Add;
 3535     case LLVMAtomicRMWBinOpSub: return AtomicRMWInst::Sub;
 3536     case LLVMAtomicRMWBinOpAnd: return AtomicRMWInst::And;
 3537     case LLVMAtomicRMWBinOpNand: return AtomicRMWInst::Nand;
 3538     case LLVMAtomicRMWBinOpOr: return AtomicRMWInst::Or;
 3539     case LLVMAtomicRMWBinOpXor: return AtomicRMWInst::Xor;
 3540     case LLVMAtomicRMWBinOpMax: return AtomicRMWInst::Max;
 3541     case LLVMAtomicRMWBinOpMin: return AtomicRMWInst::Min;
 3542     case LLVMAtomicRMWBinOpUMax: return AtomicRMWInst::UMax;
 3543     case LLVMAtomicRMWBinOpUMin: return AtomicRMWInst::UMin;
 3544     case LLVMAtomicRMWBinOpFAdd: return AtomicRMWInst::FAdd;
 3545     case LLVMAtomicRMWBinOpFSub: return AtomicRMWInst::FSub;
 3551 static LLVMAtomicRMWBinOp mapToLLVMRMWBinOp(AtomicRMWInst::BinOp BinOp) {
 3553     case AtomicRMWInst::Xchg: return LLVMAtomicRMWBinOpXchg;
 3554     case AtomicRMWInst::Add: return LLVMAtomicRMWBinOpAdd;
 3555     case AtomicRMWInst::Sub: return LLVMAtomicRMWBinOpSub;
 3556     case AtomicRMWInst::And: return LLVMAtomicRMWBinOpAnd;
 3557     case AtomicRMWInst::Nand: return LLVMAtomicRMWBinOpNand;
 3558     case AtomicRMWInst::Or: return LLVMAtomicRMWBinOpOr;
 3559     case AtomicRMWInst::Xor: return LLVMAtomicRMWBinOpXor;
 3560     case AtomicRMWInst::Max: return LLVMAtomicRMWBinOpMax;
 3561     case AtomicRMWInst::Min: return LLVMAtomicRMWBinOpMin;
 3562     case AtomicRMWInst::UMax: return LLVMAtomicRMWBinOpUMax;
 3563     case AtomicRMWInst::UMin: return LLVMAtomicRMWBinOpUMin;
 3564     case AtomicRMWInst::FAdd: return LLVMAtomicRMWBinOpFAdd;
 3565     case AtomicRMWInst::FSub: return LLVMAtomicRMWBinOpFSub;
 3649   if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(P))
 3649   if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(P))
 3660   if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(P))
 3660   if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(P))
 3681     O = cast<AtomicRMWInst>(P)->getOrdering();
 3695   return mapToLLVMRMWBinOp(unwrap<AtomicRMWInst>(Inst)->getOperation());
 3699   unwrap<AtomicRMWInst>(Inst)->setOperation(mapFromLLVMRMWBinOp(BinOp));
 3920   AtomicRMWInst::BinOp intop = mapFromLLVMRMWBinOp(op);
 3942   if (AtomicRMWInst *I = dyn_cast<AtomicRMWInst>(P))
 3942   if (AtomicRMWInst *I = dyn_cast<AtomicRMWInst>(P))
 3952   if (AtomicRMWInst *I = dyn_cast<AtomicRMWInst>(P))
 3952   if (AtomicRMWInst *I = dyn_cast<AtomicRMWInst>(P))
lib/IR/Instruction.cpp
  431   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
  431   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
  432     return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() &&
  433            RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() &&
  434            RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() &&
  435            RMWI->getSyncScopeID() == cast<AtomicRMWInst>(I2)->getSyncScopeID();
lib/IR/Instructions.cpp
 1521                 OperandTraits<AtomicRMWInst>::op_begin(this),
 1522                 OperandTraits<AtomicRMWInst>::operands(this),
 1532                 OperandTraits<AtomicRMWInst>::op_begin(this),
 1533                 OperandTraits<AtomicRMWInst>::operands(this),
 1540   case AtomicRMWInst::Xchg:
 1542   case AtomicRMWInst::Add:
 1544   case AtomicRMWInst::Sub:
 1546   case AtomicRMWInst::And:
 1548   case AtomicRMWInst::Nand:
 1550   case AtomicRMWInst::Or:
 1552   case AtomicRMWInst::Xor:
 1554   case AtomicRMWInst::Max:
 1556   case AtomicRMWInst::Min:
 1558   case AtomicRMWInst::UMax:
 1560   case AtomicRMWInst::UMin:
 1562   case AtomicRMWInst::FAdd:
 1564   case AtomicRMWInst::FSub:
 1566   case AtomicRMWInst::BAD_BINOP:
 4160 AtomicRMWInst *AtomicRMWInst::cloneImpl() const {
 4161   AtomicRMWInst *Result =
 4162     new AtomicRMWInst(getOperation(), getOperand(0), getOperand(1),
lib/IR/Verifier.cpp
  481   void visitAtomicRMWInst(AtomicRMWInst &RMWI);
 3516 void Verifier::visitAtomicRMWInst(AtomicRMWInst &RMWI) {
 3525   if (Op == AtomicRMWInst::Xchg) {
 3530   } else if (AtomicRMWInst::isFPOperation(Op)) {
lib/Target/AArch64/AArch64ISelLowering.cpp
12141 AArch64TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
12148   if (AI->getOperation() == AtomicRMWInst::Nand) return AtomicExpansionKind::LLSC;
lib/Target/AArch64/AArch64ISelLowering.h
  428   shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
   34   AtomicRMWInst::BinOp Op;
   49   Value *buildScan(IRBuilder<> &B, AtomicRMWInst::BinOp Op, Value *V,
   52   void optimizeAtomic(Instruction &I, AtomicRMWInst::BinOp Op, unsigned ValIdx,
   68   void visitAtomicRMWInst(AtomicRMWInst &I);
  106 void AMDGPUAtomicOptimizer::visitAtomicRMWInst(AtomicRMWInst &I) {
  116   AtomicRMWInst::BinOp Op = I.getOperation();
  121   case AtomicRMWInst::Add:
  122   case AtomicRMWInst::Sub:
  123   case AtomicRMWInst::And:
  124   case AtomicRMWInst::Or:
  125   case AtomicRMWInst::Xor:
  126   case AtomicRMWInst::Max:
  127   case AtomicRMWInst::Min:
  128   case AtomicRMWInst::UMax:
  129   case AtomicRMWInst::UMin:
  162   AtomicRMWInst::BinOp Op;
  170     Op = AtomicRMWInst::Add;
  175     Op = AtomicRMWInst::Sub;
  180     Op = AtomicRMWInst::And;
  185     Op = AtomicRMWInst::Or;
  190     Op = AtomicRMWInst::Xor;
  195     Op = AtomicRMWInst::Min;
  200     Op = AtomicRMWInst::UMin;
  205     Op = AtomicRMWInst::Max;
  210     Op = AtomicRMWInst::UMax;
  245 static Value *buildNonAtomicBinOp(IRBuilder<> &B, AtomicRMWInst::BinOp Op,
  252   case AtomicRMWInst::Add:
  254   case AtomicRMWInst::Sub:
  256   case AtomicRMWInst::And:
  258   case AtomicRMWInst::Or:
  260   case AtomicRMWInst::Xor:
  263   case AtomicRMWInst::Max:
  266   case AtomicRMWInst::Min:
  269   case AtomicRMWInst::UMax:
  272   case AtomicRMWInst::UMin:
  282 Value *AMDGPUAtomicOptimizer::buildScan(IRBuilder<> &B, AtomicRMWInst::BinOp Op,
  385 static APInt getIdentityValueForAtomicOp(AtomicRMWInst::BinOp Op,
  390   case AtomicRMWInst::Add:
  391   case AtomicRMWInst::Sub:
  392   case AtomicRMWInst::Or:
  393   case AtomicRMWInst::Xor:
  394   case AtomicRMWInst::UMax:
  396   case AtomicRMWInst::And:
  397   case AtomicRMWInst::UMin:
  399   case AtomicRMWInst::Max:
  401   case AtomicRMWInst::Min:
  407                                            AtomicRMWInst::BinOp Op,
  484     const AtomicRMWInst::BinOp ScanOp =
  485         Op == AtomicRMWInst::Sub ? AtomicRMWInst::Add : Op;
  485         Op == AtomicRMWInst::Sub ? AtomicRMWInst::Add : Op;
  520     case AtomicRMWInst::Add:
  521     case AtomicRMWInst::Sub: {
  530     case AtomicRMWInst::And:
  531     case AtomicRMWInst::Or:
  532     case AtomicRMWInst::Max:
  533     case AtomicRMWInst::Min:
  534     case AtomicRMWInst::UMax:
  535     case AtomicRMWInst::UMin:
  541     case AtomicRMWInst::Xor:
  623       case AtomicRMWInst::Add:
  624       case AtomicRMWInst::Sub:
  627       case AtomicRMWInst::And:
  628       case AtomicRMWInst::Or:
  629       case AtomicRMWInst::Max:
  630       case AtomicRMWInst::Min:
  631       case AtomicRMWInst::UMax:
  632       case AtomicRMWInst::UMin:
  635       case AtomicRMWInst::Xor:
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
 4675 AMDGPUTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
 4677   case AtomicRMWInst::Nand:
 4678   case AtomicRMWInst::FAdd:
 4679   case AtomicRMWInst::FSub:
lib/Target/AMDGPU/AMDGPUISelLowering.h
  328   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
  134   if (auto AI = dyn_cast<AtomicRMWInst>(Inst)) {
lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
  556     } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UseInst)) {
  556     } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UseInst)) {
lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  565   if (isa<AtomicRMWInst>(V) || isa<AtomicCmpXchgInst>(V))
lib/Target/AMDGPU/SIISelLowering.cpp
10911 SITargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
10913   case AtomicRMWInst::FAdd: {
lib/Target/AMDGPU/SIISelLowering.h
  397   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
lib/Target/ARM/ARMISelLowering.cpp
16500 ARMTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
lib/Target/ARM/ARMISelLowering.h
  565     shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
lib/Target/Hexagon/HexagonISelLowering.h
  329     shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override {
lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
  103     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Nand, false, 32,
  106     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Nand, false, 64,
  109     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Xchg, true, 32,
  112     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Add, true, 32, NextMBBI);
  114     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Sub, true, 32, NextMBBI);
  116     return expandAtomicBinOp(MBB, MBBI, AtomicRMWInst::Nand, true, 32,
  119     return expandAtomicMinMaxOp(MBB, MBBI, AtomicRMWInst::Max, true, 32,
  122     return expandAtomicMinMaxOp(MBB, MBBI, AtomicRMWInst::Min, true, 32,
  125     return expandAtomicMinMaxOp(MBB, MBBI, AtomicRMWInst::UMax, true, 32,
  128     return expandAtomicMinMaxOp(MBB, MBBI, AtomicRMWInst::UMin, true, 32,
  237                                    AtomicRMWInst::BinOp BinOp, int Width) {
  255   case AtomicRMWInst::Nand:
  298     MachineBasicBlock *DoneMBB, AtomicRMWInst::BinOp BinOp, int Width) {
  321   case AtomicRMWInst::Xchg:
  326   case AtomicRMWInst::Add:
  331   case AtomicRMWInst::Sub:
  336   case AtomicRMWInst::Nand:
  445   bool IsSigned = BinOp == AtomicRMWInst::Min || BinOp == AtomicRMWInst::Max;
  445   bool IsSigned = BinOp == AtomicRMWInst::Min || BinOp == AtomicRMWInst::Max;
  468   case AtomicRMWInst::Max: {
  476   case AtomicRMWInst::Min: {
  484   case AtomicRMWInst::UMax:
  490   case AtomicRMWInst::UMin:
lib/Target/RISCV/RISCVISelLowering.cpp
 2740 RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
 2754 getIntrinsicForMaskedAtomicRMWBinOp(unsigned XLen, AtomicRMWInst::BinOp BinOp) {
 2759     case AtomicRMWInst::Xchg:
 2761     case AtomicRMWInst::Add:
 2763     case AtomicRMWInst::Sub:
 2765     case AtomicRMWInst::Nand:
 2767     case AtomicRMWInst::Max:
 2769     case AtomicRMWInst::Min:
 2771     case AtomicRMWInst::UMax:
 2773     case AtomicRMWInst::UMin:
 2782     case AtomicRMWInst::Xchg:
 2784     case AtomicRMWInst::Add:
 2786     case AtomicRMWInst::Sub:
 2788     case AtomicRMWInst::Nand:
 2790     case AtomicRMWInst::Max:
 2792     case AtomicRMWInst::Min:
 2794     case AtomicRMWInst::UMax:
 2796     case AtomicRMWInst::UMin:
 2805     IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr,
 2828   if (AI->getOperation() == AtomicRMWInst::Min ||
 2829       AI->getOperation() == AtomicRMWInst::Max) {
lib/Target/RISCV/RISCVISelLowering.h
  202   shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
  204       IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr,
lib/Target/Sparc/SparcISelLowering.cpp
 1354 TargetLowering::AtomicExpansionKind SparcTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
 1355   if (AI->getOperation() == AtomicRMWInst::Xchg &&
lib/Target/Sparc/SparcISelLowering.h
  205     AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
lib/Target/SystemZ/SystemZISelLowering.cpp
 3851   if (auto *AI = dyn_cast<AtomicRMWInst>(&I))
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  287 WebAssemblyTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
  290   case AtomicRMWInst::Add:
  291   case AtomicRMWInst::Sub:
  292   case AtomicRMWInst::And:
  293   case AtomicRMWInst::Or:
  294   case AtomicRMWInst::Xor:
  295   case AtomicRMWInst::Xchg:
lib/Target/WebAssembly/WebAssemblyISelLowering.h
   46   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
lib/Target/X86/X86ISelLowering.cpp
26482 X86TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
26493   AtomicRMWInst::BinOp Op = AI->getOperation();
26497   case AtomicRMWInst::Xchg:
26498   case AtomicRMWInst::Add:
26499   case AtomicRMWInst::Sub:
26502   case AtomicRMWInst::Or:
26503   case AtomicRMWInst::And:
26504   case AtomicRMWInst::Xor:
26509   case AtomicRMWInst::Nand:
26510   case AtomicRMWInst::Max:
26511   case AtomicRMWInst::Min:
26512   case AtomicRMWInst::UMax:
26513   case AtomicRMWInst::UMin:
26514   case AtomicRMWInst::FAdd:
26515   case AtomicRMWInst::FSub:
26523 X86TargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
26536     if (AI->getOperation() == AtomicRMWInst::Or && C->isZero() &&
lib/Target/X86/X86ISelLowering.h
 1411     shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override;
 1414     lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const override;
lib/Target/XCore/XCoreISelLowering.cpp
 1009   if (auto *AI = dyn_cast<AtomicRMWInst>(&I))
lib/Transforms/IPO/Attributor.cpp
  298   if (auto *RMWI = dyn_cast<AtomicRMWInst>(I))
 1297     Ordering = cast<AtomicRMWInst>(I)->getOrdering();
 1367     return cast<AtomicRMWInst>(I)->isVolatile();
lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
   23 bool isIdempotentRMW(AtomicRMWInst& RMWI) {
   26     case AtomicRMWInst::FAdd: // -0.0
   28     case AtomicRMWInst::FSub: // +0.0
   39     case AtomicRMWInst::Add:
   40     case AtomicRMWInst::Sub:
   41     case AtomicRMWInst::Or:
   42     case AtomicRMWInst::Xor:
   44     case AtomicRMWInst::And:
   46     case AtomicRMWInst::Min:
   48     case AtomicRMWInst::Max:
   50     case AtomicRMWInst::UMin:
   52     case AtomicRMWInst::UMax:
   61 bool isSaturating(AtomicRMWInst& RMWI) {
   64     case AtomicRMWInst::FAdd:
   65     case AtomicRMWInst::FSub:
   78   case AtomicRMWInst::Xchg:
   80   case AtomicRMWInst::Or:
   82   case AtomicRMWInst::And:
   84   case AtomicRMWInst::Min:
   86   case AtomicRMWInst::Max:
   88   case AtomicRMWInst::UMin:
   90   case AtomicRMWInst::UMax:
   96 Instruction *InstCombiner::visitAtomicRMWInst(AtomicRMWInst &RMWI) {
  107       RMWI.getOperation() != AtomicRMWInst::Xchg) {
  108     RMWI.setOperation(AtomicRMWInst::Xchg);
  119   if (RMWI.getOperation() == AtomicRMWInst::Xchg &&
  139       RMWI.getOperation() != AtomicRMWInst::Or) {
  140     RMWI.setOperation(AtomicRMWInst::Or);
  144              RMWI.getOperation() != AtomicRMWInst::FAdd) {
  145     RMWI.setOperation(AtomicRMWInst::FAdd);
lib/Transforms/InstCombine/InstCombineInternal.h
  436   Instruction *visitAtomicRMWInst(AtomicRMWInst &SI);
lib/Transforms/Instrumentation/AddressSanitizer.cpp
 1369   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
 1369   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
lib/Transforms/Instrumentation/BoundsChecking.cpp
  164     } else if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(&I)) {
  164     } else if (AtomicRMWInst *AI = dyn_cast<AtomicRMWInst>(&I)) {
lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
  532   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
  532   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
  569   if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I))
  569   if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I))
lib/Transforms/Instrumentation/InstrOrderFile.cpp
  146         AtomicRMWInst::Add, BufferIdx, ConstantInt::get(Int32Ty, 1),
lib/Transforms/Instrumentation/InstrProfiling.cpp
  208         Builder.CreateAtomicRMW(AtomicRMWInst::Add, Addr, LiveInValue,
  644     Builder.CreateAtomicRMW(AtomicRMWInst::Add, Addr, Inc->getStep(),
lib/Transforms/Instrumentation/MemorySanitizer.cpp
 1847   void visitAtomicRMWInst(AtomicRMWInst &I) {
lib/Transforms/Instrumentation/ThreadSanitizer.cpp
  122   FunctionCallee TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1]
  248     for (int op = AtomicRMWInst::FIRST_BINOP;
  249         op <= AtomicRMWInst::LAST_BINOP; ++op) {
  252       if (op == AtomicRMWInst::Xchg)
  254       else if (op == AtomicRMWInst::Add)
  256       else if (op == AtomicRMWInst::Sub)
  258       else if (op == AtomicRMWInst::And)
  260       else if (op == AtomicRMWInst::Or)
  262       else if (op == AtomicRMWInst::Xor)
  264       else if (op == AtomicRMWInst::Nand)
  419   if (isa<AtomicRMWInst>(I))
  659   } else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
  659   } else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
lib/Transforms/Scalar/InferAddressSpaces.cpp
  364     else if (auto *RMW = dyn_cast<AtomicRMWInst>(&I))
  364     else if (auto *RMW = dyn_cast<AtomicRMWInst>(&I))
  772   if (auto *RMW = dyn_cast<AtomicRMWInst>(Inst))
  772   if (auto *RMW = dyn_cast<AtomicRMWInst>(Inst))
  773     return OpNo == AtomicRMWInst::getPointerOperandIndex() &&
lib/Transforms/Scalar/LoopStrengthReduce.cpp
  826   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
  826   } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
  845   } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
  845   } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
lib/Transforms/Scalar/LowerAtomic.cpp
   42 static bool LowerAtomicRMWInst(AtomicRMWInst *RMWI) {
   52   case AtomicRMWInst::Xchg:
   55   case AtomicRMWInst::Add:
   58   case AtomicRMWInst::Sub:
   61   case AtomicRMWInst::And:
   64   case AtomicRMWInst::Nand:
   67   case AtomicRMWInst::Or:
   70   case AtomicRMWInst::Xor:
   73   case AtomicRMWInst::Max:
   77   case AtomicRMWInst::Min:
   81   case AtomicRMWInst::UMax:
   85   case AtomicRMWInst::UMin:
   89   case AtomicRMWInst::FAdd:
   92   case AtomicRMWInst::FSub:
  125     else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(Inst))
  125     else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(Inst))
lib/Transforms/Utils/FunctionComparator.cpp
  633   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(L)) {
  633   if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(L)) {
  635                              cast<AtomicRMWInst>(R)->getOperation()))
  638                              cast<AtomicRMWInst>(R)->isVolatile()))
  641                              cast<AtomicRMWInst>(R)->getOrdering()))
  644                       cast<AtomicRMWInst>(R)->getSyncScopeID());
lib/Transforms/Utils/InlineFunction.cpp
  993       else if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I))
  993       else if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I))
lib/Transforms/Utils/SimplifyCFG.cpp
 4185       } else if (auto *RMWI = dyn_cast<AtomicRMWInst>(BBI)) {
 4185       } else if (auto *RMWI = dyn_cast<AtomicRMWInst>(BBI)) {
tools/clang/lib/CodeGen/CGAtomic.cpp
  496   llvm::AtomicRMWInst::BinOp Op = llvm::AtomicRMWInst::Add;
  496   llvm::AtomicRMWInst::BinOp Op = llvm::AtomicRMWInst::Add;
  570     Op = llvm::AtomicRMWInst::Xchg;
  579     Op = llvm::AtomicRMWInst::Add;
  588     Op = llvm::AtomicRMWInst::Sub;
  593     Op = E->getValueType()->isSignedIntegerType() ? llvm::AtomicRMWInst::Min
  594                                                   : llvm::AtomicRMWInst::UMin;
  599     Op = E->getValueType()->isSignedIntegerType() ? llvm::AtomicRMWInst::Max
  600                                                   : llvm::AtomicRMWInst::UMax;
  609     Op = llvm::AtomicRMWInst::And;
  618     Op = llvm::AtomicRMWInst::Or;
  627     Op = llvm::AtomicRMWInst::Xor;
  634     Op = llvm::AtomicRMWInst::Nand;
  639   llvm::AtomicRMWInst *RMWI =
tools/clang/lib/CodeGen/CGBuiltin.cpp
  118     CodeGenFunction &CGF, llvm::AtomicRMWInst::BinOp Kind, const CallExpr *E,
  168                                llvm::AtomicRMWInst::BinOp Kind,
  177                                    llvm::AtomicRMWInst::BinOp Kind,
  300   auto *Result = CGF.Builder.CreateAtomicRMW(
  301                    AtomicRMWInst::Add,
  313   auto *Result = CGF.Builder.CreateAtomicRMW(
  314                    AtomicRMWInst::Sub,
  784     llvm::AtomicRMWInst::BinOp RMWOp = llvm::AtomicRMWInst::Or;
  784     llvm::AtomicRMWInst::BinOp RMWOp = llvm::AtomicRMWInst::Or;
  787       RMWOp = llvm::AtomicRMWInst::And;
  963     return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E);
  965     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E);
  967     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E);
  969     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Sub, E);
  971     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E);
  973     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E);
  975     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E,
  978     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E,
  981     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Add, E,
  984     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E,
  987     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E,
  990     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xchg, E,
  999     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E,
 1002     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E,
 1005     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Or, E,
 1008     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E,
 1011     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E,
 1014     return MakeBinaryAtomicValue(*this, AtomicRMWInst::Xor, E,
 1017     return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E,
 1020     return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E,
 1023     return MakeBinaryAtomicValue(*this, AtomicRMWInst::And, E,
 2722     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Add, E);
 2728     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Sub, E);
 2734     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Or, E);
 2740     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::And, E);
 2746     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xor, E);
 2752     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Nand, E);
 2756     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Min, E);
 2758     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Max, E);
 2760     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMin, E);
 2762     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::UMax, E);
 2769     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Add, E,
 2776     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Sub, E,
 2783     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::And, E,
 2790     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Or, E,
 2797     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Xor, E,
 2804     return EmitBinaryAtomicPost(*this, llvm::AtomicRMWInst::Nand, E,
 2826     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E);
 2833     return EmitBinaryAtomic(*this, llvm::AtomicRMWInst::Xchg, E);
 2906       AtomicRMWInst *Result = nullptr;
 2910         Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
 2915         Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
 2919         Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
 2924         Result = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
 2929             llvm::AtomicRMWInst::Xchg, Ptr, NewVal,
 2959       AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg,
 2959       AtomicRMWInst *RMW = Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg,
 8307     AtomicRMWInst *RMWI = Builder.CreateAtomicRMW(
 8308       AtomicRMWInst::Add, Arg0, Arg1,
13637     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Add, E);
13642     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Sub, E);
13647     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::And, E);
13652     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Or, E);
13657     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xor, E);
13662     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Xchg, E);
13667     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Max, E);
13672     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMax, E);
13677     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::Min, E);
13682     return MakeBinaryAtomicValue(*this, llvm::AtomicRMWInst::UMin, E);
13695     return Builder.CreateAtomicRMW(llvm::AtomicRMWInst::FAdd, Ptr, Val,
tools/clang/lib/CodeGen/CGExprScalar.cpp
 2373           llvm::AtomicRMWInst::Xchg, LV.getPointer(), True,
 2384       llvm::AtomicRMWInst::BinOp aop = isInc ? llvm::AtomicRMWInst::Add :
 2384       llvm::AtomicRMWInst::BinOp aop = isInc ? llvm::AtomicRMWInst::Add :
 2385         llvm::AtomicRMWInst::Sub;
 2852       llvm::AtomicRMWInst::BinOp aop = llvm::AtomicRMWInst::BAD_BINOP;
 2852       llvm::AtomicRMWInst::BinOp aop = llvm::AtomicRMWInst::BAD_BINOP;
 2861           aop = llvm::AtomicRMWInst::Add;
 2864           aop = llvm::AtomicRMWInst::Sub;
 2867           aop = llvm::AtomicRMWInst::And;
 2870           aop = llvm::AtomicRMWInst::Xor;
 2873           aop = llvm::AtomicRMWInst::Or;
 2878       if (aop != llvm::AtomicRMWInst::BAD_BINOP) {
tools/clang/lib/CodeGen/CGStmtOpenMP.cpp
 3766   llvm::AtomicRMWInst::BinOp RMWOp;
 3769     RMWOp = llvm::AtomicRMWInst::Add;
 3774     RMWOp = llvm::AtomicRMWInst::Sub;
 3777     RMWOp = llvm::AtomicRMWInst::And;
 3780     RMWOp = llvm::AtomicRMWInst::Or;
 3783     RMWOp = llvm::AtomicRMWInst::Xor;
 3787                 ? (IsXLHSInRHSPart ? llvm::AtomicRMWInst::Min
 3788                                    : llvm::AtomicRMWInst::Max)
 3789                 : (IsXLHSInRHSPart ? llvm::AtomicRMWInst::UMin
 3790                                    : llvm::AtomicRMWInst::UMax);
 3794                 ? (IsXLHSInRHSPart ? llvm::AtomicRMWInst::Max
 3795                                    : llvm::AtomicRMWInst::Min)
 3796                 : (IsXLHSInRHSPart ? llvm::AtomicRMWInst::UMax
 3797                                    : llvm::AtomicRMWInst::UMin);
 3800     RMWOp = llvm::AtomicRMWInst::Xchg;
unittests/Analysis/AliasAnalysisTest.cpp
  185   auto *AtomicRMW =
  186       new AtomicRMWInst(AtomicRMWInst::Xchg, Addr, ConstantInt::get(IntType, 1),
  186       new AtomicRMWInst(AtomicRMWInst::Xchg, Addr, ConstantInt::get(IntType, 1),