reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/LiveInterval.cpp

 1358     MachineInstr *MI = RI->getParent();

lib/CodeGen/MIRVRegNamerUtils.cpp

   67         DoesMISideEffect |= (UI->getParent()->getParent() != MI->getParent());
  106         MRI.def_begin(Reg)->dump();
  122       MachineInstr *Def = RI->getParent();

lib/CodeGen/MachineCombiner.cpp

  235     MachineInstr *UseMO = RI->getParent();

lib/CodeGen/MachineTraceMetrics.cpp

  640     DefMI = DefI->getParent();

lib/CodeGen/ModuloSchedule.cpp

  356     if (I->getParent()->getParent() != BB)
  743           if (UI->getParent()->getParent() != BB) {

lib/CodeGen/PeepholeOptimizer.cpp

 2100         Def = DI->getParent();

lib/CodeGen/RegisterScavenging.cpp

  661   MachineInstr &DefMI = *FirstDef->getParent();

lib/CodeGen/SelectionDAG/FastISel.cpp

 2360   MachineInstr *User = RI->getParent();

lib/CodeGen/TwoAddressInstructionPass.cpp

  489     DefMI = Begin->getParent();

lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp

 1959       LLVM_DEBUG(DI->getParent()->dump());

lib/Target/AMDGPU/SIFoldOperands.cpp

  571       MachineInstr *RSUseMI = RSUse->getParent();
  577       if (RSUse->getSubReg() != RegSeqDstSubReg)
  633           FoldCandidate FC = FoldCandidate(Use->getParent(),
 1133       MachineInstr *UseMI = Use->getParent();
 1198       MachineInstr *UseMI = U->getParent();

lib/Target/AMDGPU/SIInstrInfo.cpp

 5622     MachineInstr &UseMI = *I->getParent();
 5645       } while (I != E && I->getParent() == &UseMI);

lib/Target/ARC/ARCOptAddrMode.cpp

  146     MachineInstr *User = it->getParent();

lib/Target/BPF/BPFMISimplifyPatchable.cpp

  135           I->setReg(SrcReg);

lib/Target/Hexagon/HexagonBitSimplify.cpp

  362     I->setReg(NewR);
  377     I->setReg(NewR);
  378     I->setSubReg(NewSR);
  393     if (I->getSubReg() != OldSR)
  395     I->setReg(NewR);
  396     I->setSubReg(NewSR);
  974     MachineInstr *UseI = I->getParent();
 1218       MachineInstr &UseI = *I->getParent();
 3116       MachineInstr *UseI = UI->getParent();
 3169       MachineInstr *UseI = UI->getParent();

lib/Target/Hexagon/HexagonEarlyIfConv.cpp

  393         if (U->getParent()->isPHI())

lib/Target/Hexagon/HexagonGenInsert.cpp

 1308       UIs.insert(I->getParent());

lib/Target/Hexagon/HexagonGenPredicate.cpp

  238     MachineInstr *UseI = I->getParent();

lib/Target/Hexagon/HexagonHardwareLoops.cpp

 1052     if (std::next(I) != End || !I->getParent()->isPHI())
 1055     MachineInstr *OnePhi = I->getParent();
 1101         MachineInstr *UseMI = I->getParent();

lib/Target/Hexagon/HexagonSplitDouble.cpp

  438       MachineInstr *UseI = U->getParent();
  548       const MachineInstr *UseI = I->getParent();
 1146       SplitIns.insert(U->getParent());
 1175       Uses.insert(U->getParent());

lib/Target/PowerPC/PPCReduceCRLogicals.cpp

  657     MRI->use_nodbg_begin(CRI.MI->getOperand(0).getReg())->getParent();

lib/Target/RISCV/RISCVMergeBaseOffset.cpp

   89   LoADDI = MRI->use_begin(HiLuiDestReg)->getParent();
  184   MachineInstr &Tail = *MRI->use_begin(DestReg)->getParent();