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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
include/llvm/ADT/BitVector.h 147 BitVector(const BitVector &RHS) : Size(RHS.size()) {
153 size_t Capacity = NumBitWords(RHS.size());
174 for (unsigned i = 0; i < NumBitWords(size()); ++i)
181 for (unsigned i = 0; i < NumBitWords(size()); ++i)
290 return Result < size() ? Result : -1;
412 assert(E <= size() && "Attempted to set out-of-bounds range!");
451 assert(E <= size() && "Attempted to reset out-of-bounds range!");
478 for (unsigned i = 0; i < NumBitWords(size()); ++i)
524 unsigned ThisWords = NumBitWords(size());
525 unsigned RHSWords = NumBitWords(RHS.size());
534 unsigned ThisWords = NumBitWords(size());
535 unsigned RHSWords = NumBitWords(RHS.size());
560 unsigned ThisWords = NumBitWords(size());
561 unsigned RHSWords = NumBitWords(RHS.size());
577 unsigned ThisWords = NumBitWords(size());
578 unsigned RHSWords = NumBitWords(RHS.size());
588 unsigned ThisWords = NumBitWords(size());
589 unsigned RHSWords = NumBitWords(RHS.size());
603 if (size() < RHS.size())
603 if (size() < RHS.size())
604 resize(RHS.size());
605 for (size_t i = 0, e = NumBitWords(RHS.size()); i != e; ++i)
611 if (size() < RHS.size())
611 if (size() < RHS.size())
612 resize(RHS.size());
613 for (size_t i = 0, e = NumBitWords(RHS.size()); i != e; ++i)
721 Size = RHS.size();
854 return Result < size() ? Result : -1;
901 MaskWords = std::min(MaskWords, (size() + 31) / 32);
include/llvm/ADT/PackedVector.h 105 unsigned size() const { return Bits.size() >> (BitNum - 1); }
include/llvm/ADT/SmallBitVector.h 193 return isSmall() ? getSmallSize() : getPointer()->size();
lib/CodeGen/BranchFolding.cpp 242 for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
lib/CodeGen/GlobalISel/RegisterBank.cpp 99 assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
lib/CodeGen/MachineFunction.cpp 108 for (BitVector::size_type I = 0; I < Properties.size(); ++I) {
lib/CodeGen/MachineRegisterInfo.cpp 515 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() &&
lib/CodeGen/MachineVerifier.cpp 216 return Reg < regsReserved.size() && regsReserved.test(Reg);
lib/CodeGen/PrologEpilogInserter.cpp 734 if (FreeStart + ObjSize > StackBytesFree.size())
lib/CodeGen/RegisterClassInfo.cpp 73 if (Reserved.size() != RR.size() || RR != Reserved) {
73 if (Reserved.size() != RR.size() || RR != Reserved) {
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 5485 if (ArgNo >= FuncInfo.DescribedArgs.size())
lib/CodeGen/StackColoring.cpp 534 for (unsigned I = 0, E = BV.size(); I != E; ++I)
lib/DebugInfo/MSF/MSFBuilder.cpp 65 if (Addr >= FreeBlocks.size()) {
112 uint32_t OldBlockCount = FreeBlocks.size();
150 uint32_t MSFBuilder::getTotalBlockCount() const { return FreeBlocks.size(); }
165 if (Block >= FreeBlocks.size())
284 SB->NumBlocks = FreeBlocks.size();
lib/DebugInfo/PDB/UDTLayout.cpp 58 return UsedBytes.size() - UsedBytes.count();
64 return UsedBytes.size() - (Last + 1);
287 ChildBytes.resize(UsedBytes.size());
lib/Support/CodeGenCoverage.cpp 35 if (RuleCoverage.size() <= RuleID)
41 if (RuleCoverage.size() <= RuleID)
lib/Support/GlobPattern.cpp 161 if (Pats[0].size() == 0) {
lib/Target/AMDGPU/GCNRegBankReassign.cpp 330 if (Reg + StartBit >= RegsUsed.size())
lib/Target/Hexagon/HexagonBitSimplify.cpp 103 if (Idx >= size())
122 assert(Idx < size());
127 if (Idx >= size())
145 if (size() <= Idx)
1203 BitVector Used(Bits.size());
1251 BitVector T(Bits.size());
lib/Target/Hexagon/HexagonGenInsert.cpp 119 if (Idx >= size())
138 assert(Idx < size());
143 if (Idx >= size())
161 if (size() <= Idx)
lib/Target/PowerPC/PPCFrameLowering.cpp 2173 if (VolatileVFReg < BVAllocatable.size()) {
lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h 100 if (I >= VRegStackified.size())
106 if (I < VRegStackified.size())
111 if (I >= VRegStackified.size())
lib/Transforms/Coroutines/CoroFrame.cpp 161 for (size_t I = 0, N = BV.size(); I < N; ++I)
tools/clang/lib/Analysis/CFGReachabilityAnalysis.cpp 44 llvm::BitVector visited(analyzed.size());
47 DstReachability.resize(analyzed.size(), false);
tools/clang/lib/Analysis/ReachableCode.cpp 399 : Visited(reachable.size()),
tools/clang/lib/CodeGen/CGStmt.cpp 2298 assert(ResultTypeRequiresCast.size() <= ResultRegDests.size());
2331 if ((i < ResultTypeRequiresCast.size()) && ResultTypeRequiresCast[i]) {
tools/llvm-exegesis/lib/MCInstrDescView.cpp 190 assert(A.size() == B.size() && B.size() == Forbidden.size());
190 assert(A.size() == B.size() && B.size() == Forbidden.size());
190 assert(A.size() == B.size() && B.size() == Forbidden.size());
190 assert(A.size() == B.size() && B.size() == Forbidden.size());
191 const auto Size = A.size();
tools/llvm-exegesis/lib/RegisterAliasing.h 108 assert(A.size() == B.size());
108 assert(A.size() == B.size());
tools/llvm-exegesis/lib/Target.cpp 102 assert(AllowedRegs.size() == ForbiddenRegs.size());
102 assert(AllowedRegs.size() == ForbiddenRegs.size());
tools/llvm-pdbutil/PrettyClassLayoutGraphicalDumper.cpp 54 if (RelativeOffset < UseMap.size() && (Item->getSize() > 0)) {
79 if (Prev < UseMap.size())
unittests/ADT/BitVectorTest.cpp 28 EXPECT_EQ(0U, Vec.size());
36 EXPECT_EQ(5U, Vec.size());
44 EXPECT_EQ(11U, Vec.size());
53 EXPECT_EQ(11U, Inv.size());
90 EXPECT_TRUE(Vec.size() == 6);
130 EXPECT_EQ(Vec.size() - Count, Vec.count());
134 EXPECT_EQ(130U, Vec.size());
142 EXPECT_EQ(130U, Vec.size());
150 EXPECT_EQ(64U, Vec.size());
158 EXPECT_EQ(64U, Vec.size());
166 EXPECT_EQ(0U, Inv.size());
174 EXPECT_EQ(0U, Vec.size());
469 EXPECT_EQ(50U, A.size());
481 EXPECT_EQ(50U, A.size());
490 EXPECT_EQ(100U, A.size());
561 EXPECT_EQ(20u, Small.size());
584 EXPECT_EQ(20u, Big.size());
606 EXPECT_EQ(20u, Small.size());
628 EXPECT_EQ(20u, Big.size());
648 EXPECT_EQ(10u, Small.size());
669 EXPECT_EQ(20u, Big.size());
733 EXPECT_EQ(Vec.size(), Vec.count());
744 EXPECT_EQ(10u, A.size());
860 EXPECT_EQ(40U, A.size());
1058 EXPECT_EQ((size_t)0, A.size());
1125 EXPECT_EQ(10U, Vec.size());
1130 EXPECT_EQ(11U, Vec.size());
1135 EXPECT_EQ(12U, Vec.size());
1140 EXPECT_EQ(13U, Vec.size());
1149 EXPECT_EQ(213U, Vec.size());
utils/TableGen/CodeGenRegisters.cpp 1707 NormalRegs.resize(std::max(Reg->EnumValue + 1, NormalRegs.size()));
utils/TableGen/RegisterInfoEmitter.cpp 591 for (unsigned i = 0, e = Bits.size(); i < e; i += Width) {
604 if (v >= Values.size())