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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc10449 { 7727 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24992 { 7684 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39622 /* 82946*/ OPC_MorphNodeTo2, TARGET_VAL(X86::SUB16rr), 0,
44397 /* 92863*/ OPC_MorphNodeTo2, TARGET_VAL(X86::SUB16rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 8149 return fastEmitInst_rr(X86::SUB16rr, &X86::GR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 1706 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr,
lib/Target/X86/X86FlagsCopyLowering.cpp 989 Sub = X86::SUB16rr;
lib/Target/X86/X86ISelDAGToDAG.cpp 4570 case ISD::SUB: ROpc = X86::SUB16rr; MOpc = X86::SUB16rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 230 { X86::SUB16rr, X86::SUB16mr, 0 },
1516 { X86::SUB16rr, X86::SUB16rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3308 case X86::SUB16rr:
3368 (FlagI.getOpcode() == X86::CMP16rr && OI.getOpcode() == X86::SUB16rr) ||
3423 case X86::SUB16rr: case X86::SUB8rr: case X86::SUB64rm:
3572 case X86::SUB16rr:
3586 case X86::SUB16rr: NewOpcode = X86::CMP16rr; break;
lib/Target/X86/X86MacroFusion.cpp 122 case X86::SUB16rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1330 case X86::SUB16rr: case X86::SUB16ri: case X86::SUB16ri8: