reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 1031     tmp = fieldFromInstruction(insn, 8, 2);
 1032     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1033     tmp = 0x0;
 1034     tmp |= fieldFromInstruction(insn, 0, 2) << 3;
 1035     tmp |= fieldFromInstruction(insn, 5, 3) << 0;
 1036     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1037     tmp = 0x0;
 1038     tmp |= fieldFromInstruction(insn, 3, 2) << 2;
 1039     tmp |= fieldFromInstruction(insn, 10, 1) << 4;
 1040     MI.addOperand(MCOperand::createImm(tmp));
 1043     tmp = fieldFromInstruction(insn, 0, 3);
 1044     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1045     tmp = fieldFromInstruction(insn, 8, 3);
 1046     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1047     tmp = fieldFromInstruction(insn, 5, 3);
 1048     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1051     tmp = fieldFromInstruction(insn, 7, 1);
 1052     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1053     tmp = fieldFromInstruction(insn, 8, 3);
 1054     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1055     tmp = 0x0;
 1056     tmp |= fieldFromInstruction(insn, 0, 3) << 0;
 1057     tmp |= fieldFromInstruction(insn, 4, 3) << 3;
 1058     MI.addOperand(MCOperand::createImm(tmp));
 1061     tmp = 0x0;
 1062     tmp |= fieldFromInstruction(insn, 0, 3) << 2;
 1063     tmp |= fieldFromInstruction(insn, 5, 6) << 5;
 1064     if (DecodeSignedOperand<11>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1067     tmp = fieldFromInstruction(insn, 8, 3);
 1068     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1069     tmp = 0x0;
 1070     tmp |= fieldFromInstruction(insn, 0, 3) << 0;
 1071     tmp |= fieldFromInstruction(insn, 4, 4) << 3;
 1072     MI.addOperand(MCOperand::createImm(tmp));
 1075     tmp = fieldFromInstruction(insn, 0, 10);
 1076     MI.addOperand(MCOperand::createImm(tmp));
 1079     tmp = fieldFromInstruction(insn, 5, 3);
 1080     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1081     tmp = fieldFromInstruction(insn, 8, 3);
 1082     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1083     tmp = fieldFromInstruction(insn, 0, 3);
 1084     MI.addOperand(MCOperand::createImm(tmp));
 1087     tmp = fieldFromInstruction(insn, 8, 3);
 1088     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1089     tmp = 0x0;
 1090     tmp |= fieldFromInstruction(insn, 0, 2) << 3;
 1091     tmp |= fieldFromInstruction(insn, 5, 3) << 0;
 1092     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1095     tmp = 0x0;
 1096     tmp |= fieldFromInstruction(insn, 0, 2) << 3;
 1097     tmp |= fieldFromInstruction(insn, 5, 3) << 0;
 1098     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1099     tmp = fieldFromInstruction(insn, 8, 3);
 1100     if (DecodeFromCyclicRange<3>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1103     tmp = fieldFromInstruction(insn, 8, 3);
 1104     if (DecodeFromCyclicRange<3>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1107     tmp = fieldFromInstruction(insn, 8, 3);
 1108     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1113     tmp = fieldFromInstruction(insn, 8, 3);
 1114     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1115     tmp = fieldFromInstruction(insn, 5, 3);
 1116     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1119     tmp = fieldFromInstruction(insn, 5, 6);
 1120     MI.addOperand(MCOperand::createImm(tmp));
 1123     tmp = fieldFromInstruction(insn, 5, 3);
 1124     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1125     tmp = fieldFromInstruction(insn, 8, 3);
 1126     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1127     tmp = fieldFromInstruction(insn, 0, 5) << 2;
 1128     MI.addOperand(MCOperand::createImm(tmp));
 1131     tmp = fieldFromInstruction(insn, 5, 3);
 1132     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1133     tmp = fieldFromInstruction(insn, 8, 3);
 1134     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1135     tmp = fieldFromInstruction(insn, 0, 5);
 1136     MI.addOperand(MCOperand::createImm(tmp));
 1139     tmp = fieldFromInstruction(insn, 5, 3);
 1140     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1141     tmp = fieldFromInstruction(insn, 8, 3);
 1142     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1143     tmp = fieldFromInstruction(insn, 0, 5) << 1;
 1144     MI.addOperand(MCOperand::createImm(tmp));
 1147     tmp = fieldFromInstruction(insn, 8, 3);
 1148     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1149     tmp = fieldFromInstruction(insn, 0, 5);
 1150     MI.addOperand(MCOperand::createImm(tmp));
 1153     tmp = fieldFromInstruction(insn, 8, 3);
 1154     if (DecodeGBR32ShortRegister(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1155     tmp = fieldFromInstruction(insn, 0, 5) << 2;
 1156     MI.addOperand(MCOperand::createImm(tmp));
 1159     tmp = fieldFromInstruction(insn, 0, 5) << 2;
 1160     MI.addOperand(MCOperand::createImm(tmp));
 1163     tmp = 0x0;
 1164     tmp |= fieldFromInstruction(insn, 1, 4) << 0;
 1165     tmp |= fieldFromInstruction(insn, 8, 3) << 4;
 1166     MI.addOperand(MCOperand::createImm(tmp));
 1169     tmp = fieldFromInstruction(insn, 8, 3);
 1170     if (DecodeGBR32ShortRegister(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1173     tmp = 0x0;
 1174     tmp |= fieldFromInstruction(insn, 1, 4) << 0;
 1175     tmp |= fieldFromInstruction(insn, 8, 2) << 4;
 1176     MI.addOperand(MCOperand::createImm(tmp));
 1179     tmp = fieldFromInstruction(insn, 0, 9) << 2;
 1180     if (DecodeSignedOperand<11>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1183     tmp = fieldFromInstruction(insn, 0, 9);
 1184     if (DecodeSignedOperand<9>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1187     tmp = fieldFromInstruction(insn, 0, 9) << 1;
 1188     if (DecodeSignedOperand<10>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1191     tmp = fieldFromInstruction(insn, 8, 3);
 1192     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1193     tmp = fieldFromInstruction(insn, 0, 8) << 2;
 1194     MI.addOperand(MCOperand::createImm(tmp));
 1197     tmp = fieldFromInstruction(insn, 8, 3);
 1198     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1199     tmp = fieldFromInstruction(insn, 0, 8);
 1200     MI.addOperand(MCOperand::createImm(tmp));
 1203     tmp = fieldFromInstruction(insn, 8, 3);
 1204     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1205     tmp = fieldFromInstruction(insn, 0, 7);
 1206     MI.addOperand(MCOperand::createImm(tmp));
 1209     tmp = fieldFromInstruction(insn, 8, 3);
 1210     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1211     tmp = fieldFromInstruction(insn, 0, 7) << 1;
 1212     if (DecodeBranchTargetS<8>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1215     tmp = fieldFromInstruction(insn, 0, 9) << 1;
 1216     if (DecodeBranchTargetS<10>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1219     tmp = fieldFromInstruction(insn, 0, 6) << 1;
 1220     if (DecodeBranchTargetS<7>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1223     tmp = fieldFromInstruction(insn, 0, 11) << 2;
 1224     if (DecodeBranchTargetS<13>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1227     tmp = 0x0;
 1228     tmp |= fieldFromInstruction(insn, 6, 10) << 11;
 1229     tmp |= fieldFromInstruction(insn, 17, 10) << 1;
 1230     if (DecodeBranchTargetS<21>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1231     tmp = fieldFromInstruction(insn, 0, 5);
 1232     MI.addOperand(MCOperand::createImm(tmp));
 1235     tmp = 0x0;
 1236     tmp |= fieldFromInstruction(insn, 0, 4) << 21;
 1237     tmp |= fieldFromInstruction(insn, 6, 10) << 11;
 1238     tmp |= fieldFromInstruction(insn, 17, 10) << 1;
 1239     if (DecodeBranchTargetS<25>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1242     tmp = 0x0;
 1243     tmp |= fieldFromInstruction(insn, 0, 4) << 21;
 1244     tmp |= fieldFromInstruction(insn, 6, 10) << 11;
 1245     tmp |= fieldFromInstruction(insn, 18, 9) << 2;
 1246     if (DecodeBranchTargetS<25>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1249     tmp = 0x0;
 1250     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1251     tmp |= fieldFromInstruction(insn, 17, 7) << 1;
 1252     if (DecodeBranchTargetS<9>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1253     tmp = 0x0;
 1254     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1255     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1256     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1257     tmp = fieldFromInstruction(insn, 6, 6);
 1258     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1259     tmp = fieldFromInstruction(insn, 0, 3);
 1260     MI.addOperand(MCOperand::createImm(tmp));
 1263     tmp = 0x0;
 1264     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1265     tmp |= fieldFromInstruction(insn, 17, 7) << 1;
 1266     if (DecodeBranchTargetS<9>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1267     tmp = 0x0;
 1268     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1269     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1270     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1271     tmp = fieldFromInstruction(insn, 6, 6);
 1272     MI.addOperand(MCOperand::createImm(tmp));
 1273     tmp = fieldFromInstruction(insn, 0, 3);
 1274     MI.addOperand(MCOperand::createImm(tmp));
 1277     tmp = fieldFromInstruction(insn, 0, 6);
 1278     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1279     tmp = 0x0;
 1280     tmp |= fieldFromInstruction(insn, 12, 3) << 12;
 1281     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1282     tmp |= fieldFromInstruction(insn, 16, 8) << 0;
 1283     tmp |= fieldFromInstruction(insn, 24, 3) << 9;
 1284     if (DecodeMEMrs9(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1287     tmp = fieldFromInstruction(insn, 0, 6);
 1288     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1289     tmp = 0x0;
 1290     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1291     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1292     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1293     tmp = 0x0;
 1294     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1295     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1296     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1297     tmp = 0x0;
 1298     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1299     tmp |= fieldFromInstruction(insn, 16, 8) << 0;
 1300     if (DecodeSignedOperand<9>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1303     tmp = fieldFromInstruction(insn, 6, 6);
 1304     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1305     tmp = 0x0;
 1306     tmp |= fieldFromInstruction(insn, 12, 3) << 12;
 1307     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1308     tmp |= fieldFromInstruction(insn, 16, 8) << 0;
 1309     tmp |= fieldFromInstruction(insn, 24, 3) << 9;
 1310     if (DecodeMEMrs9(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1313     tmp = 0x0;
 1314     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1315     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1316     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1317     tmp = fieldFromInstruction(insn, 6, 6);
 1318     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1319     tmp = 0x0;
 1320     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1321     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1322     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1323     tmp = 0x0;
 1324     tmp |= fieldFromInstruction(insn, 15, 1) << 8;
 1325     tmp |= fieldFromInstruction(insn, 16, 8) << 0;
 1326     if (DecodeSignedOperand<9>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1329     tmp = fieldFromInstruction(insn, 0, 6);
 1330     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1331     tmp = 0x0;
 1332     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1333     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1334     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1335     tmp = fieldFromInstruction(insn, 6, 6);
 1336     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1339     tmp = 0x0;
 1340     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1341     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1342     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1343     tmp = fieldFromInstruction(insn, 6, 6);
 1344     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1347     tmp = fieldFromInstruction(insn, 6, 6);
 1348     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1351     tmp = fieldFromInstruction(insn, 0, 6);
 1352     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1353     tmp = 0x0;
 1354     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1355     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1356     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1357     tmp = fieldFromInstruction(insn, 6, 6);
 1358     MI.addOperand(MCOperand::createImm(tmp));
 1361     tmp = 0x0;
 1362     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1363     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1364     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1365     tmp = fieldFromInstruction(insn, 6, 6);
 1366     MI.addOperand(MCOperand::createImm(tmp));
 1369     tmp = 0x0;
 1370     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1371     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1372     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1373     tmp = 0x0;
 1374     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1375     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1376     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1377     tmp = 0x0;
 1378     tmp |= fieldFromInstruction(insn, 0, 6) << 6;
 1379     tmp |= fieldFromInstruction(insn, 6, 6) << 0;
 1380     if (DecodeSignedOperand<12>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1383     tmp = 0x0;
 1384     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1385     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1386     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1387     tmp = 0x0;
 1388     tmp |= fieldFromInstruction(insn, 0, 6) << 6;
 1389     tmp |= fieldFromInstruction(insn, 6, 6) << 0;
 1390     if (DecodeSignedOperand<12>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1393     tmp = 0x0;
 1394     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1395     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1396     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1397     tmp = fieldFromInstruction(insn, 6, 6);
 1398     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1399     tmp = 0x0;
 1400     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1401     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1402     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1403     tmp = fieldFromInstruction(insn, 0, 5);
 1404     MI.addOperand(MCOperand::createImm(tmp));
 1407     tmp = fieldFromInstruction(insn, 8, 3);
 1408     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1409     tmp = fieldFromInstruction(insn, 16, 32);
 1410     MI.addOperand(MCOperand::createImm(tmp));
 1413     tmp = fieldFromInstruction(insn, 8, 3);
 1414     if (DecodeFromCyclicRange<3>(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1415     tmp = fieldFromInstruction(insn, 16, 32);
 1416     MI.addOperand(MCOperand::createImm(tmp));
 1425     tmp = fieldFromInstruction(insn, 0, 6);
 1426     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1427     tmp = 0x0;
 1428     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1429     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1430     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1431     tmp = fieldFromInstruction(insn, 32, 32);
 1432     MI.addOperand(MCOperand::createImm(tmp));
 1435     tmp = 0x0;
 1436     tmp |= fieldFromInstruction(insn, 12, 3) << 3;
 1437     tmp |= fieldFromInstruction(insn, 24, 3) << 0;
 1438     if (DecodeGPR32RegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { return MCDisassembler::Fail; }
 1439     tmp = fieldFromInstruction(insn, 32, 32);
 1440     MI.addOperand(MCOperand::createImm(tmp));
 1443     tmp = fieldFromInstruction(insn, 32, 32);
 1444     MI.addOperand(MCOperand::createImm(tmp));