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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/R600GenRegisterInfo.inc 8902 { 32, 32, 32, VTLists+0 }, // R600_Reg32
8903 { 32, 32, 32, VTLists+0 }, // R600_TReg32
8904 { 32, 32, 32, VTLists+0 }, // R600_TReg32_X
8905 { 32, 32, 32, VTLists+1 }, // R600_Addr
8906 { 32, 32, 32, VTLists+0 }, // R600_KC0
8907 { 32, 32, 32, VTLists+0 }, // R600_KC1
8908 { 32, 32, 32, VTLists+0 }, // R600_TReg32_W
8909 { 32, 32, 32, VTLists+0 }, // R600_TReg32_Y
8910 { 32, 32, 32, VTLists+0 }, // R600_TReg32_Z
8911 { 32, 32, 32, VTLists+0 }, // R600_ArrayBase
8912 { 32, 32, 32, VTLists+0 }, // R600_KC0_W
8913 { 32, 32, 32, VTLists+0 }, // R600_KC0_X
8914 { 32, 32, 32, VTLists+0 }, // R600_KC0_Y
8915 { 32, 32, 32, VTLists+0 }, // R600_KC0_Z
8916 { 32, 32, 32, VTLists+0 }, // R600_KC1_W
8917 { 32, 32, 32, VTLists+0 }, // R600_KC1_X
8918 { 32, 32, 32, VTLists+0 }, // R600_KC1_Y
8919 { 32, 32, 32, VTLists+0 }, // R600_KC1_Z
8920 { 32, 32, 32, VTLists+1 }, // R600_LDS_SRC_REG
8921 { 32, 32, 32, VTLists+1 }, // R600_Predicate
8922 { 32, 32, 32, VTLists+1 }, // R600_Addr_W
8923 { 32, 32, 32, VTLists+1 }, // R600_Addr_Y
8924 { 32, 32, 32, VTLists+1 }, // R600_Addr_Z
8925 { 32, 32, 32, VTLists+1 }, // R600_LDS_SRC_REG_and_R600_Reg32
8926 { 32, 32, 32, VTLists+1 }, // R600_Predicate_Bit
8927 { 64, 64, 64, VTLists+3 }, // R600_Reg64
8928 { 64, 64, 64, VTLists+8 }, // R600_Reg64Vertical
8929 { 64, 64, 64, VTLists+8 }, // R600_Reg64Vertical_with_sub0_in_R600_TReg32_W
8930 { 64, 64, 64, VTLists+8 }, // R600_Reg64Vertical_with_sub0_in_R600_TReg32_X
8931 { 64, 64, 64, VTLists+8 }, // R600_Reg64Vertical_with_sub0_in_R600_TReg32_Y
8932 { 64, 64, 64, VTLists+8 }, // R600_Reg64Vertical_with_sub0_in_R600_TReg32_Z
8933 { 128, 128, 128, VTLists+11 }, // R600_Reg128
8934 { 128, 128, 128, VTLists+11 }, // R600_Reg128Vertical
8935 { 128, 128, 128, VTLists+11 }, // R600_Reg128Vertical_with_sub0_in_R600_TReg32_W
8936 { 128, 128, 128, VTLists+11 }, // R600_Reg128Vertical_with_sub0_in_R600_TReg32_X
8937 { 128, 128, 128, VTLists+11 }, // R600_Reg128Vertical_with_sub0_in_R600_TReg32_Y
8938 { 128, 128, 128, VTLists+11 }, // R600_Reg128Vertical_with_sub0_in_R600_TReg32_Z